Semiconductor devices having improved gate insulating layers and related methods of fabricating such devices

A method for fabricating a semiconductor device, the method comprising:

• forming an insulating layer and a first conductive layer on a semiconductor substrate;
• forming a first device isolation layer to define a cell active region in the semiconductor substrate;
• forming a second device isolation layer to define a peripheral active region in the semiconductor substrate;
• removing the insulating layer and the first conductive layer on the cell active region to expose the semiconductor substrate in the cell active region;
• forming a tunnel insulating layer directly on the semiconductor substrate in the cell active region that is exposed by the removing of the insulating layer;
• forming a cell gate pattern on the cell active region;
• and
• forming a peripheral gate pattern on the peripheral active region.

A method for fabricating a semiconductor device, the method comprising:

• forming an insulating layer and a first conductive layer on a cell region and a peripheral region of a substrate, wherein the insulating layer is thicker in at least a portion of the peripheral region than is the insulating layer in the cell region;
• forming a first device isolation layer to define a cell active region in the cell region of the substrate;
• forming a second device isolation layer to define a peripheral active region in the peripheral region semiconductor substrate;
• removing the insulating layer and the first conductive layer on the cell region;
• forming a tunnel insulating layer directly on the substrate of the cell region;
• forming a cell gate pattern on the tunnel insulating layer on the cell active region;
• and
• forming a peripheral gate pattern on the insulating layer on the peripheral active region.