Loop manipulation in a behavioral synthesis tool

A networked computer method comprising:

• receiving a plurality of dependent loops;
• analyzing the plurality of dependent loops, wherein the analyzing comprises performing a loop dependency analysis that comprises determining that each of the plurality of dependent loops share at least one data dependency;
• based at least in part on results of the loop dependency analysis, merging the plurality of dependent loops;
• and
• storing on a computer-readable medium circuit design information updated by the merging.

A method comprising:

• identifying loops within a source code representation of a hardware circuit, wherein a first loop comprises a statement that writes to a variable, and wherein a second loop reads from the variable;
• performing a loop dependency analysis on at least the first loop and second loop;
• based at least in part on results of the loop dependency analysis, merging at least the first loop and second loop;
• and
• storing on a computer-readable medium circuit design information updated by the merging.

A system for designing integrated circuits, comprising:

• an input device for receiving a source code description of an integrated circuit;
• a processor for executing software;
• software that identifies loops within the source code;
• software that performs a loop dependency analysis on at least two loops;
• software that merges the at least two loops together based at least in part on the loop dependency analysis, wherein at least one of the loops shares at least one data dependency with at least one other of the loops;
• an output device for outputting at least one integrated circuit design created by the software;
• and
• storing the integrated circuit design on a computer-readable medium.

A method comprising:

• receiving input code, wherein the input code comprises code relating to a plurality of loops, wherein at least one of the plurality of loops comprises a dependent loop;
• processing the input code, wherein the processing comprises (1) performing a loop dependency analysis on at least two of the plurality of loops, and (2) based at least in part on the loop dependency analysis, merging the at least two of the plurality of loops, wherein at least one of the at least two of the plurality of loops is a dependent loop that comprises a data dependency on another of the at least two of the plurality of loops;
• providing output code, wherein the output code comprises a circuit design based at least in part on the at least two merged loops;
• and
• storing the output code on a computer-readable medium.

In a user interface for a behavioral synthesis tool, a method comprising:

• receiving a plurality of choices for setting a mergeable directive corresponding to a plurality of loops, wherein at least one of the plurality of loops comprises a data dependency on at least one other of the plurality of loops;
• selecting one of the plurality of choices for setting the mergeable directive;
• and
• storing on a computer-readable medium circuit design information modified at least in part by the selecting.

In designing a hardware circuit, a method comprising:

• identifying loops within a source code representation of a hardware design;
• receiving via a graphical user interface (GUI) an indication to perform a dependent loop merging of a plurality of the loops, wherein at least two of the plurality of loops share at least one data dependency;
• merging the plurality of loops;
• and
• storing on a computer-readable medium circuit design information modified based at least in part on the merging.

A method of creating a hardware circuit design, comprising:

• selecting an option relating to a possible dependent loop merging of a plurality of loops, wherein at least two of the plurality of loops comprises at least one data dependency therebetween;
• receiving information regarding at least one impact the selected option might have on the hardware circuit design;
• and
• storing modified circuit design information on a computer-readable medium, wherein the circuit design information is modified based at least in part on the information.

A method of designing an integrated circuit, comprising:

• identifying loops within a source code representation of a hardware design;
• receiving via a graphical user interface (GUI) a request to analyze a potential dependent loop merging of a plurality of the loops, wherein the plurality of loops comprises a first loop that writes to at least one variable that is accessed by at least a second loop in the plurality of loops;
• providing an analysis of the potential dependent loop merging of the plurality of loops;
• modifying circuit design information based at least in part on the analysis;
• and
• storing the circuit design information on a computer-readable medium.

A method of designing an integrated circuit, comprising:

• performing a loop dependency analysis on at least a first loop and a second loop, wherein each of the first loop and the second loop use at least one variable;
• at least partially unrolling the first loop, wherein the first loop comprises a dependent loop;
• based at least in part on the loop dependency analysis, performing a dependent loop merging comprising merging the first loop with the second loop;
• updating circuit design information based at least in part on the merging;
• and
• storing the updated circuit design information on a computer-readable medium.

A method of designing an integrated circuit, comprising:

• performing a loop dependency analysis on at least a first loop and a second loop that share at least one data dependency;
• based at least in part on the loop dependency analysis, performing a dependent loop merging comprising merging the first loop with the second loop, wherein the second loop comprises a dependent loop;
• pipelining the first loop and the second loop;
• and
• updating circuit design information based at least in part on the merging and the pipelining;
• and
• storing the updated circuit design information on a computer-readable medium.

A method, comprising:

• identifying a first loop comprising at least one statement that accesses at least one variable;
• identifying a second loop comprising at least one statement that accesses the at least one variable, wherein the second loop is mergeable with the first loop;
• performing a loop dependency analysis on the first and second loops;
• based at least in part on results of the loop dependency analysis, performing a first dependent loop merging comprising merging the first loop and the second loop together into a first merged loop;
• and
• storing on a computer-readable medium circuit design information that is modified based at least in part on the merging.