Self-synchronizing pseudorandom bit sequence checker
AssigneeInternational Business Machines Corporation
InventorsMohit Kapur, Seongwon Kim
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AssigneeInternational Business Machines Corporation
InventorsMohit Kapur, Seongwon Kim
Estimating the term…
Self-synchronizing techniques for checking the accuracy of a pseudorandom bit sequence (PRBS) are provided. The PRBS being checked may be generated by a device (e.g., a device under test) in response to a PRBS received by the device (e.g., from a PRBS generator). In an aspect of the invention, a PRBS checking technique includes the following steps/operations. For a given clock cycle, the presence of an error bit in the PRBS generated by the device is detected. The error bit represents a mismatch between the PRBS input to the device and the PRBS output from the device. Then, propagation of the error bit is prohibited for subsequent clock cycles. The prohibition step/operation may serve to avoid multiple errors being counted for a single error occurrence and/or masking errors in the PRBS output by the device.
A method of checking the accuracy of a pseudorandom bit sequence (PRBS), wherein a first PRBS is generated at a PRBS generator, including a first shift register chain, and presented to a device under test, and the device under test generates a second PRBS in response to the first PRBS, the method comprising the steps of:
Dependencies are inferred from the claim text.