Semiconductor integrated circuit

A semiconductor integrated circuit comprising:

• a memory interface circuit;
• a data processing circuit;
• a clock generator;
• and
• a memory controller coupled to said memory interface circuit and configured to perform access control on a double data rate type synchronous memory which outputs read data in synchronization with a data strobe signal,
• wherein said memory interface circuit is configured to be coupled to the double data rate type synchronous memory,
• wherein said clock generator generates an internal clock signal and a memory clock signal for supply to the double data rate type synchronous memory,
• wherein said memory interface circuit determines an arrival delay of a data strobe signal received in a read cycle of the double data rate type synchronous memory relative to the internal clock signal, samples read data of the read cycle based on a signal obtained by shifting the phase of the received data strobe signal, and synchronizes the sampled read data to the internal clock signal based on a result of the determination of the arrival delay,
• wherein said memory interface circuit is controlled by the memory controller to determine the arrival delay in the read cycle of the double data rate type synchronous memory, and
• wherein the memory interface circuit is configured to provide the result of determination of the arrival delay to a synchronizing circuit of said memory interface circuit during a predetermined period in which no read cycle occurs with respect to the double data rate type synchronous memory.