System and method to track changes in memory
AssigneeIntel Corporation
InventorsAlon Naveh, Abraham Mendelson
Life of this patent
Estimating the term…
Abstract
Briefly, a system and a method to efficiently track changes in memory or storage areas, for example, in cache memories of computers and electronic systems. A method in accordance with an exemplary embodiment of the invention includes, for example, updating a tracking list with an address and/or a corresponding address to be updated of a changed entry in an intermediate memory. A system in accordance with an exemplary embodiment of the invention may include, for example, a tracking unit to track the locations of potential data discrepancies between a reference memory and an intermediate memory.
Claims51
An apparatus comprising:
- a processor associated with an intermediate memory and a reference memory;
- and
- a tracking unit, operably coupled to said processor, storing a variable-size list of addresses of the reference memory corresponding to addresses of one or more changed entries in the intermediate memory, wherein the size of the variable-size list of addresses corresponds to the number of said one or more changed entries, and wherein the processor writes the contents of said intermediate memory exclusive of the contents of said reference memory, wherein updates are only sent from said intermediate memory to said reference memory when a predefined criterion is met, and wherein said reference memory and said intermediate memory arc accessible exclusively by said processor.
A processing platform comprising:
- a processor;
- an intermediate memory operatively associated with said processor;
- a reference memory operatively associated with said processor;
- and
- a tracking unit, operably coupled to said processor, storing a variable-size list of addresses of said reference memory corresponding to addresses of one or more changed entries in said intermediate memory, wherein the size of the variable-size list of addresses corresponds to the number of said one or more changed entries, and wherein the processor writes the contents of said intermediate memory exclusive of the contents of said reference memory, wherein updates are only sent from said intermediate memory to said reference memory when a predefined criterion is met, and wherein said reference memory and said intermediate memory are accessible exclusively by said processor.
A system comprising:
- a processor;
- an intermediate memory operatively associated with said processor;
- a reference memory operatively associated with said processor;
- a tracking unit operably coupled to said processor and storing a variable-size list of addresses of said reference memory corresponding to addresses of one or more changed entries in said intermediate memory, wherein the size of the variable-size list of addresses corresponds to the number of said one or more changed entries and wherein the processor writes the contents of said intermediate memory exclusive of the contents of said reference memory, wherein updates are only sent from said intermediate memory to said reference memory when a predefined criterion is met, and wherein said reference memory and said intermediate memory are accessible exclusively by said processor.
A method comprising updating a variable-size tracking list with an address of a reference memory operatively associated with a processor, which address corresponds to an address of a changed entry in an intermediate memory operatively associated with said processor, wherein the size of the variable-size tracking list corresponds to a current number of changed entries in the intermediate memory, wherein said variable-size tracking list is operably coupled to said processor, and wherein the processor writes the contents of said intermediate memory exclusive of the contents of said reference memory, wherein updates are only sent from said intermediate memory to said reference memory when a predefined criterion is met, and wherein said reference memory and said intermediate memory are accessible exclusively by said processor.
A machine-readable medium having stored thereon a set of instructions that, if executed by a machine, cause the machine to perform a method comprising updating a variable-size tracking list with an address of a reference memory operatively associated with a processor, which address corresponds to an address of a changed entry in an intermediate memory operatively associated with said processor, wherein the size of the variable-size tracking list corresponds to a current number of changed entries in the intermediate memory, wherein said variable-size tracking list is operably coupled to said processor, and wherein the contents of said intermediate memory are written from the processor exclusive of the contents of said reference memory, wherein updates are only sent from said intermediate memory to said reference memory when a predefined criterion is met, and wherein said reference memory and said intermediate memory are accessible exclusively by said processor.
An apparatus comprising:
- a processor, associated with an intermediate memory accessible exclusively by the processor and a reference memory accessible exclusively by the processor, writing the contents of the intermediate memory exclusive of the contents of the reference memory;
- and
- a tracking unit, operably coupled to said processor, updating a variable-size tracking list with an address of the reference memory, which address corresponds to an address of a changed entry in the intermediate memory, wherein the size of the variable-size tracking list corresponds to a current number of changed entries in the intermediate memory, and wherein updates are only sent from said intermediate memory to said reference memory when a predefined criterion is met.
Dependencies are inferred from the claim text.