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US 7,412,477 B1Granted
Interpolation of signals from a delay line
AssigneeXilinx, Inc.
InventorJohn K. Jennings
Life of this patent
Estimating the term…
Abstract
Method and apparatus for interpolation of signals from a delay line is described. An input signal is obtained from which progressively delayed input signals are generated from the input signal. Two of the progressively delayed input signals are accessed and interpolated to provide a phase-adjusted signal.
Claims16
A phase adjustment circuit, comprising:
- a delay line, the delay line having taps for providing progressively delayed samples of an input signal;
- selection circuitry coupled to receive the progressively delayed samples and to receive control signaling to select two samples of the progressively delayed samples;
- and
- an interpolator, consisting essentially of passive elements, coupled to receive the two samples selected and configured to provide a phase-adjusted signal, the phase-adjusted signal being an interpolation of the two samples selected, wherein the interpolator comprises:
- respective impedances coupled together at a common node for outputting the phase-adjusted signal wherein an impedance of the respective impedances is selected from a group consisting of a resistor, an inductor, a capacitor and any combination thereof;
- independent impedances coupled to respective output nodes for providing respective interpolations of the two samples selected;
- and
- a set of impedances coupled to the output nodes and to a common node, the common node for outputting a respective interpolation of the two samples selected.
5 more elements
A method for phase adjustment, comprising:
- obtaining an input signal;
- generating progressively delayed input signals from the input signal;
- using a selector, accessing two of the progressively delayed input signals;
- and
- using only passive elements, interpolating the two of the progressively delayed input signals to provide a phase-adjusted signal,
- wherein the interpolating comprises coupling sets of impedances together at a common node for outputting the phase-adjusted signal and wherein an impedance of the respective impedances is selected from a group consisting of a resistor, an inductor, a capacitor and any combination thereof;
- independent impedances coupled to respective output nodes for providing respective interpolations of the two samples selected;
- and
- a set of impedances coupled to the output nodes and to a common node, the common node for outputting a respective interpolation of the two samples selected.
6 more elements
An integrated circuit, comprising:
- a digital clock module, the digital clock module including:
- delay line means for providing progressively delayed samples of an input signal;
- selection circuitry means for receiving the progressively delayed samples and for receiving control signaling to select two samples of the progressively delayed samples;
- and
- interpolator means for receiving the two samples selected and configured to provide a phase-adjusted signal, the phase-adjusted signal being an interpolation of the two samples selected, wherein the interpolator means comprises:
- respective impedances coupled together at a common node for outputting the phase-adjusted signal and wherein an impedance of the respective impedances is selected from a group consisting of a resistor, an inductor, a capacitor and any combination thereof;
- independent impedances coupled to respective output nodes for providing respective interpolations of the two samples selected;
- and
- a set of impedances coupled to the output nodes and to a common node, the common node for outputting a respective interpolation of the two samples selected.
6 more elements
Phase adjustment circuitry, comprising:
- discrete circuits configured to provide respective output signals;
- and
- an interpolator coupled to receive the output signals and configured to provide a phase-adjusted signal, the phase-adjusted signal being an interpolation of the output signals without use of phase inversion of the output signals;
- wherein the interpolator comprises:
- respective impedances coupled together at a common node for outputting the phase-adjusted signal and wherein an impedance of the respective impedances is selected from a group consisting of a resistor, an inductor, a capacitor and any combination thereof;
- independent impedances coupled to respective output nodes for providing respective interpolations of the two samples selected;
- and
- a set of impedances coupled to the output nodes and to a common node, the common node for outputting a respective interpolation of the two samples selected.
5 more elements
Dependencies are inferred from the claim text.