Semiconductor device and an image processor

An image processor for encoding a plurality of image data series and decoding a plurality of encoded image data series, comprising:

• a memory and a data processor;
• the data processor comprising:
• an interface control circuit which performs data read/write operation from and to a memory area of the memory;
• an encoding/decoding circuit which selectively performs encoding of image data of one series written into the memory area and decoding of encoded image data of one series;
• and
• a plurality of registers which provide an instruction of processing to the encoding/decoding circuit;
• wherein the encoding/decoding circuit performs encoding and decoding of image data of a plurality of series on a time division basis in each series in accordance with the instruction from the plurality of registers.

A semiconductor device for executing encoding for a plurality of image data series, comprising:

• an interface control circuit for executing read/write from and to a memory area;
• an encoding circuit for executing encoding of image data of one series written into the memory area;
• and
• a plurality of registers for giving an instruction of processing to the encoding circuit;
• wherein the encoding circuit executes encoding on a time division basis and in a series unit for image data of a plurality of series in accordance with the instruction from the plurality of registers.

An image processor for encoding a plurality of image data series, comprising:

• a memory and a data processor;
• the data processor comprising:
• an interface control circuit for executing read/write from and to a memory area of the memory;
• an encoding circuit for executing encoding of image data of one series written into the memory area;
• and
• a plurality of registers for giving an instruction of processing to the encoding circuit;
• wherein the encoding circuit executes encoding on a time division basis and in a series unit for image data of a plurality of series in accordance with the instruction from the plurality of registers.