Maximum likelihood block decision feedback estimation for CCK demodulation apparatus and method

A method for demodulating one or more complementary code keying (CCK) symbols from a packet where said CCK symbols are preceded by a preamble, said process comprising:

• a first step of characterizing a communications channel during said preamble;
• a second step of generating a first set of channel coefficients for use in a pre-equalization value generator and a reduced set of second channel coefficients for use in generating a set of post-equalization register values;
• a third step of subtracting a previous decision correction stored in said pre-equalization register to generate a first subtractor output;
• a fourth step of iteratively demodulating a current symbol with an iteration variable k coupled to a phase variable φ2 by:
• applying said current symbol to a demodulator for each said iteration variable k value;
• performing a Fast Walsh Transform (FWT) on said first subtractor output, said FWT also using said φ2 as a butterfly input, thereafter subtracting from said FWT output a subset of post-equalization register values expanded into a current set by multiplication by four possible values of a phase φ4={1,j,−1,−j} and presenting said subtraction result to a demodulator biggest picker;
• said demodulator biggest picker selecting the largest magnitude said FWT output for a given said k value;
• a final picker selecting the largest said demodulator biggest picker output from said k iterations of a single symbol;
• said final picker selecting an input having a largest magnitude demodulator biggest picker output from said k iterations into a decision value;
• a fifth step of converting said decision value into said pre-equalization register values placed in said pre-equalization register in combination with said coefficients to generate a new set of pre-equalization register values to be used with a next current symbol;
• repeating said third, said fourth, and said fifth steps for the duration of the packet.

An apparatus for converting a code symbol of length nsymbol to a channel compensated decision feedback value, said code symbol comprising a plurality of code chips, said apparatus having:

• a plurality flt_len of registers, each said register having an input and an output;
• a plurality of first multiplexers, each said multiplexer coupling each said code chip to a corresponding said register input during a first interval, each said multiplexer coupling said register input to a unique said register output at other times;
• a plurality of second multiplexers, each said second multiplexer having a select input coupled to a corresponding said register, each said second multiplexer generating an output equal to a coefficient value multiplied by one of {1,j,−1,−j} associated with said select input;
• an adder summing the outputs of said second multiplexers and forming said decision feedback value;
• where said flt_len is greater than said nsymbol.