Semiconductor memory device and method of adjusting same
AssigneeElpida Memory, Inc.
InventorsNaohisa Nishioka, Hiroki Fujisawa
Life of this patent
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Abstract
A DLL Reset signal for delivering Fuse data from anti-fuses is generated from a reset signal which is supplied asynchronous to a clock when an initial setting is made. The DLL Reset signal is supplied to an anti-fuse block which comprises a plurality of anti-fuses, such that the delay amount of an internal signal is switched to a desired value in accordance with the Fuse data written into the anti-fuses.
Claims12
A semiconductor memory device comprising:
- an anti-fuse block having a plurality of anti-fuses for writing thereinto data required to adjust a timing of an internal signal generated when an initial setting is made;
- a delay amount switching circuit for delaying the internal signal by a desired delay amount in accordance with the data;
- a latch circuit for generating a command required to read the data from said anti-fuse block based on the internal signal delivered from said delay amount switching circuit after the delay;
- and
- a DLL reset signal generating circuit for supplying said anti-fuse block with a DLL reset signal generated by using the command signal and a reset signal supplied asynchronously to a clock for causing said anti-fuse block to deliver the data.
A method of adjusting a semiconductor memory device for adjusting a timing of an internal signal by using data written into anti-fuses when an initial setting is made, said method comprising the steps of:
- asynchronously generating a DLL Reset signal for delivering the data from said anti-fuses by using a reset signal supplied asynchronously to a clock;
- and
- supplying the DLL Reset signal to an anti-fuse block including a plurality of anti-fuses which have data written therein required for adjusting the timing of the internal signal.
A method of adjusting a semiconductor device for adjusting the timing of an internal signal by using data written into anti-fuses when an initial setting is made, said method comprising the steps of:
- reading data written into the anti-fuses included in said semiconductor device by using a command signal generated within said semiconductor device, and a reset signal supplied asynchronously to a clock signal;
- and
- adjusting the timing of the internal signal in accordance with the data.
Dependencies are inferred from the claim text.