Semiconductor integrated circuit device
AssigneeKabushiki Kaisha Toshiba
InventorKen Takeuchi
Life of this patent
Estimating the term…
Abstract
A semiconductor integrated circuit device has a first memory cell group including a plurality of rewritable nonvolatile memory cells arranged on a semiconductor chip and a second memory cell group including a plurality of rewritable nonvolatile memory cells arranged on the semiconductor chip. Setting of the write threshold voltage of the memory cell of the first memory cell group and setting of the write threshold voltage of the memory cell of the second memory cell group are variable.
Claims27
A semiconductor integrated circuit device comprising:
- a semiconductor chip,
- a first memory cell group containing a plurality of rewritable nonvolatile memory cells arranged on the chip, and
- a second memory cell group containing a plurality of rewritable nonvolatile memory cells arranged on the chip,
- wherein a verify voltage for verifying a lower side of a threshold voltage is made variable when a specific data is programmed into each of the memory cells.
A semiconductor integrated circuit device comprising:
- a semiconductor chip,
- a first memory cell group containing a plurality of rewritable nonvolatile memory cells arranged on the chip, and
- a second memory cell group containing a plurality of rewritable nonvolatile memory cells arranged on the chip,
- wherein setting of write threshold voltages of the memory cells of the first memory cell group and setting of write threshold voltages of the memory cells of the second memory cell group are made variable, and
- wherein the write threshold voltage is made variable by making variable word line voltage at verify read time.
A semiconductor integrated circuit device comprising:
- a semiconductor chip,
- a first memory cell group containing a plurality of rewritable nonvolatile memory cells arranged on the chip, and
- a second memory cell group containing a plurality of rewritable nonvolatile memory cells arranged on the chip,
- wherein setting of write threshold voltages of the memory cells of the first memory cell group and setting of write threshold voltages of the memory cells of the second memory cell group are made variable, and
- wherein word line voltage at read time of the first memory cell group and word line voltage at read time of the second memory cell group are made variable.
Dependencies are inferred from the claim text.