Enhanced MRAM reference bit programming structure
AssigneeHoneywell International Inc.
InventorEric T. Leung
Life of this patent
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Abstract
An MRAM circuit includes an MRAM array having a plurality of operational MRAM elements and a reference cell made up of one or more reference MRAM elements. A plurality of program lines within a first region are cladded with a flux-concentrating layer configured to focus a generated magnetic field while the portions of the program lines within a second region are uncladded so that the generated magnetic field is unfocused. Generally, the first region is associated with the operational MRAM elements and the second region is associated with the reference cell.
Claims14
An MRAM circuit comprising:
- a cladded region of a program line arranged near an operational MRAM element;
- and
- an uncladded region of the program line arranged near a reference MRAM element.
An MRAM circuit comprising:
- an MRAM array including a plurality of operational MRAM elements;
- a reference cell including one or more reference MRAM elements;
- a plurality of program lines wherein each of the program lines includes a first region that is cladded and a second region that is uncladded, and wherein the first region is associated with the operational MRAM elements and the second region is associated with the reference cell.
A memory device comprising:
- a first magnetoresistive element configured for storing a datum;
- a second magnetoresistive element configured for serving as a reference;
- a program line disposed near the first magnetoresistive element and the second magnetoresistive element, wherein the program line includes a first cladded region configured to focus a generated magnetic field and a second uncladded region configured to create an unfocused generated magnetic field.
Dependencies are inferred from the claim text.