Back to results
US 7,411,806 B2Granted
Memory module and memory system
AssigneeElpida Memory, Inc.
InventorsSeiji Funaba, Yoji Nishio, Kayoko Shibata
Life of this patent
Estimating the term…
Loading patent…
Loading patent…
AssigneeElpida Memory, Inc.
InventorsSeiji Funaba, Yoji Nishio, Kayoko Shibata
Estimating the term…
A memory module has a plurality of DRAMs (115), which share a bus line, on the front surface and the back surface of a board. The bus line is connected through a via hole (113) from a terminal (111) to one end of a strip line (112), and the other end of the strip line is connected to a strip line in the other layer through a via hole (119) provided for looping back the line. A termination resistor (120), provided near a termination voltage terminal (VTT), is connected to the looped-back strip line in the other layer through a via hole. The DRAM terminals are connected to the strip line each through a via hole. This memory module is mounted on a motherboard, on which a memory controller is provided, through a connector. The effective characteristic impedance of the bus line is matched with the characteristic impedance of the line in the motherboard.
A memory module comprising a board on which a plurality of memory devices, which share a bus line, are mounted on at least one of a front surface and a back surface,
A memory module comprising a board on which a plurality of memory devices, which share a bus line, are mounted on a front surface and a back surface,
A memory module comprising:
Dependencies are inferred from the claim text.