SAR analog to digital converter having multiplexable ground sense pin
AssigneeSilicon Laboratories Inc.
InventorDouglas S. Piasecki
Life of this patent
Estimating the term…
Abstract
A circuit includes a successive approximation register A/D converter for performing analog to digital conversions. The register has a ground pin and a ground sense pin. The ground sense pin is connected to a ground port of the circuit. A multiplexer connects the ground sense pin of the successive approximation register A/D converter to one of a plurality of I/O ports of the circuit package. A switch selectively connects the ground sense pin of the successive approximation register A/D converter to the ground port.
Claims13
A circuit, comprising:
- a successive approximation register A/D converter having a ground pin and a ground sense pin, wherein the ground pin is connected to a ground port of the circuit;
- a multiplexer for connecting the ground sense pin of the successive approximation register A/D converter to one of a plurality of I/O ports of the circuit;
- and
- a switch for selectively connecting the ground sense pin of the successive approximation register A/D converter to the ground port of the circuit.
A circuit, comprising:
- a successive approximation register A/D converter having a ground pin and a ground sense pin, wherein the ground pin is connected to a ground port of the circuit;
- a multiplexer for connecting the ground sense pin of the successive approximation register A/D converter to one of a plurality of I/O ports of the circuit, wherein the multiplexer selects the one of the plurality of I/O ports of the circuit responsive to a first control input from a first special function register;
- a switch for selectively connecting the ground sense pin of the successive approximation register A/D converter to the ground port of the circuit, wherein the switch selectively connects to the ground port responsive to a second control input from a second special function register;
- and
- wherein the switch disconnects the ground sense pin from the ground port and the multiplexer connects the ground sense pin to an unused one of the plurality of I/O ports of the circuit in a first mode of operation and further wherein the switch connects the ground sense pin to the ground port of the circuit package in a second mode of operation.
A method for controlling an output of a ground sense pin of a successive approximation register A/D converter in a circuit, comprising the steps of:
- determining whether any I/O ports of the circuit are available for use;
- if any I/O ports are available, disconnecting the ground sense pin of the successive approximation register A/D converter from a ground port and connecting an output of a multiplexer to an unused I/O port;
- and
- if no I/O ports are available, connecting the ground sense pin of the successive approximation register A/D converter to a ground port of the circuit.
A circuit, comprising:
- an electronic component having a ground pin and a ground sense pin, wherein the ground pin is connected to a ground port of the circuit;
- a multiplexer for connecting the ground sense pin of the electronic component to one of a plurality of I/O ports of the circuit;
- and
- a switch for selectively connecting the ground sense pin of the electronic component to the ground port of the circuit.
A circuit, comprising:
- an electronic component having a ground pin and a ground sense pin, wherein the ground pin is connected to a ground port of the circuit;
- a multiplexer for connecting the ground sense pin of the electronic component to one of a plurality of I/O ports of the circuit;
- a switch for selectively connecting the ground sense pin of the electronic component to the ground port of the circuit;
- and
- wherein the switch disconnects the ground sense pin from the ground port and the multiplexer connects the ground sense pin to an unused one of the plurality of I/O ports of the circuit in a first mode of operation and further wherein the switch connects the ground sense pin to the ground port of the circuit in a second mode of operation.
Dependencies are inferred from the claim text.