Printed wiring board assembly with self-compensating ground via and current diverting cutout
AssigneeAndrew Corporation
InventorJames L. Alford
Life of this patent
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Abstract
A multi-layer printed circuit board includes a first conductive layer including at least one conductor pattern and a plated through hole extending into the first conductive layer and intersecting the conductor pattern. A current diverting cutout in the conductor pattern is positioned proximate the intersection of the plated through hole and conductor pattern.
Claims17
A multi-layer printed circuit board comprising:
- a first conductive layer including at least one conductor pattern defining a circuit element;
- a second conductive layer defining a ground plane with respect to the first conductive layer and the circuit element;
- the second conductive layer overlying the first conductive layer;
- a plated through hole extending between the first conductive layer and the second conductive layer and intersecting the at least one conductor pattern to couple the circuit element to the ground plane;
- a current diverting cutout disposed in the circuit element and positioned proximate the intersection of the plated through hole and the at least one conductor pattern.
A method of forming a multi-layer printed circuit board comprising:
- providing a first conductive layer and including at least one conductor pattern to form a circuit element in that first conductive layer;
- forming a ground plane with a second conductive layer to overlie the first conductive layer and the circuit element;
- forming a plated through hole to extend between the first and second conductive layers and to intersect the circuit element to couple the circuit element to the ground plane;
- positioning a current diverting cutout in the circuit element proximate to where the plated through hole intersects the pattern circuit element;
- forming the current diverting cutout to have a shape to partially surround the plated through hole.
An RF filter device comprising:
- a first conductive layer including at least one resonator and a second conductive layer at least partially covering the at least one resonator of the first conductive layer;
- the second conductive layer overlying one side of the first conductive layer;
- a plated through hole extending between the first conductive layer and the second conductive layer and intersecting the at least one resonator to couple the at least one resonator to the second conductive layer;
- a current diverting cutout disposed in the at least one resonator and positioned proximate the intersection of the plated through hole and the at least one resonator.
An RF filter device comprising:
- a first conductive layer including at least one resonator and a second conductive layer at least partially covering at least one resonator of the first conductive layer;
- a plated through hole extending between the first conductive layer and the second conductive layer and intersecting the at least one resonator to couple the at least one resonator to the second conductive layer;
- a current diverting cutout disposed in the at least one resonator and positioned proximate the intersection of the plated through hole and the at least one resonator;
- the current diverting cutout having a shape to partially surround the plated through hole at the intersection.
A method of forming an RF filter device comprising:
- providing a first conductive layer and including at least one resonator in that first conductive layer;
- providing a second conductive layer to define a ground plane with respect to the first conductive layer and the at least one resonator;
- the second conductive layer overlying the first conductive layer;
- forming a plated through hole to extend between the first and second conductive layers, and to intersect the at least one resonator;
- positioning a current diverting cutout in the at least one resonator proximate to where the plated through hole intersects the at least one resonator.
A multi-layer printed circuit board comprising:
- a first conductive layer including at least one conductor pattern defining a circuit element;
- a second conductive layer defining a ground plane with respect to the first conductive layer and the circuit element;
- a plated through hole extending between the first conductive layer and the second conductive layer and intersecting the at least one conductor pattern to couple the circuit element to the ground plane;
- a current diverting cutout disposed in the circuit element and positioned proximate the intersection of the plated through hole and at least one conductor pattern;
- the current diverting cutout having a shape to partially surround the plated through hole at the intersection.
Dependencies are inferred from the claim text.