Low DC power rail-to-rail buffer amplifier for liquid crystal display application

A buffer amplifier, comprising:

• a DC bias stage;
• two complementary differential amplifiers;
• a second stage amplifier coupled to the pair of complementary differential amplifiers and the DC bias stage;
• and
• an output stage coupled to the second stage amplifier;
• wherein the second stage amplifier comprises
• a first set of bias transistors, M11 and M12;
• a second set of bias transistors, M13 and M14;
• the two sets of bias transistors forming a bi-circuit:
• wherein the M11 and M12 bias transistors are coupled to a transistor M15, which is coupled to a transistor M17;
• wherein the M13 and M14 bias transistors are coupled to transistor M16, which is coupled to a transistor M18;
• wherein in a stable state, the bias transistors are biased from the bias circuit and the current from the differential amplifiers do not flow into the bias transistors, the M16 M17 transistors are in the triode region and output transistors of the output stage consume no power.