Driver/equalizer with compensation for equalization non-idealities
AssigneeInternational Business Machines Corporation
InventorsSteven M. Clements, Carrie E. Cox, Hayden C. Cranford, Jr.
Life of this patent
Estimating the term…
Loading patent…
AssigneeInternational Business Machines Corporation
InventorsSteven M. Clements, Carrie E. Cox, Hayden C. Cranford, Jr.
Estimating the term…
A high speed serial data communication system includes provisions for the correction of equalization errors, particularly those errors introduced by equalizer non-idealities. The equalization is achieved at the data transmitter, and is based on dynamic current subtraction at the output of a differential pair. When bit time>0, the error current is removed or subtracted from the total driver current, thereby maintaining a constant total current from bit time 0 to bit time>0. The same result can also be achieved by subtracting current when bit time>0 using field effect transistors of the opposite gender. The error current can be determined empirically from simulation or through feedback using a replica of the driver. The circuits for achieving equalization error correction and the resulting electrical network analysis are shown and described.
A system for high speed data communication between a transmitter and a receiver comprising a differential output driver including an equalizer to achieve an equalization value wherein the equalization value is dynamically adjusted to correct error current Ie introduced by channel length modulation effects during equalization, wherein a secondary circuit corrects the error current by adding current to the driver current at bit time 0 to compensate for current losses due to channel length modulation when the driver output voltage is low and is subtracted from the driver current at bit time 1 to compensate for current losses.
A port circuit for a differential output driver of a high speed transmitter, said driver comprising a differential pair, the circuit including an equalizer to achieve an equalization value that is dynamically adjustable to correct error current Ie utilizing a secondary circuit to dynamically correct the error current by adding current to the driver current at bit time 0 to compensate for current losses due to channel length modulation when the driver output voltage is low, and by subtracting current from the driver current at bit time 1,
A method for correcting the equalization errors that occur in high speed data communication by differentially driving a load, comprising the steps of:
Dependencies are inferred from the claim text.