LSI package provided with interface module, and transmission line header employed in the package
AssigneeKabushiki Kaisha Toshiba
InventorsHideto Furuyama, Hiroshi Hamasaki
Life of this patent
Estimating the term…
Abstract
An LSI package encompasses a transmission line header embracing a header-base, a transmission line held by the header-base, and an interface IC chip mounted on the header-base, an interposer substrate having a plurality of board-connecting joints, which facilitate connection with the printed wiring board; an LSI chip mounted on the interposer substrate; and a receptacle having a lead terminal and being mounted on the interposer substrate, configured to accommodate the transmission line header so that the interface IC chip electrically connects to the LSI chip through the lead terminal.
Claims20
An LSI package mountable on a printed wiring board, comprising:
- a transmission line header comprising:
- a header-base,
- a transmission line held by the header-base, and
- an interface IC chip mounted on the header-base;
- an interposer substrate having a plurality of board-connecting joints, which facilitate connection with the printed wiring board;
- an LSI chip mounted on the interposer substrate;
- and
- a receptacle having a lead terminal and being mounted on the interposer substrate, configured to accommodate the transmission line header so that the interface IC chip electrically connects to the LSI chip through the lead terminal.
An LSI package mountable on a printed wiring board, comprising:
- an interposer substrate defined by a first main surface and a second main surface being opposite to the first main surface, having a plurality of board-connecting joints at the second main surface, which facilitate connection with the printed wiring board;
- an LSI chip mounted on a mount-area assigned in the first main surface;
- and
- a receptacle having a lead terminal and being mounted on the interposer substrate, configured to accommodate the transmission line header so that the interface IC chip electrically connects to the LSI chip through the lead terminal.
Dependencies are inferred from the claim text.