Semiconductor device and method of forming a semiconductor device

A power integrated circuit, comprising:

• a lateral power semiconductor device having an active region that includes a drift region, at least a portion of the drift region being provided in a membrane having opposed top and bottom surfaces, the top surface of the membrane having electrical terminals connected directly or indirectly thereto to allow a voltage to be applied laterally across the drift region, the lateral power semiconductor device being constructed and arranged such that, when the lateral power semiconductor device is an off-state and operating in a voltage-blocking mode, the equi-potential lines within said at least a portion of the drift region are all substantially perpendicular to the top and bottom surfaces of the membrane and are substantially uniformly distributed across said at least a portion of the drift region so that the electric field across said at least a portion of the drift region is substantially uniform;
• and
• at least one low voltage device.