Integrated circuit chip and manufacturing process thereof

A manufacturing process of an integrated circuit chip, comprising the steps of:

• providing a substrate, which has an inner region and a sealing region disposed around the inner region;
• forming a device layer within the inner region;
• forming a sealing base layer within the sealing region and at least one sealing part disposed under the sealing base layer within the sealing region, wherein the sealing base layer is connected with the sealing base layer;
• forming an interconnection layer and a sealing ring stack layer,
• wherein the interconnection layer is over the device layer and connecting the interconnection layer with the device layer, and the sealing ring stack layer is over the sealing base layer and connecting the sealing ring stack layer with the sealing base layer;
• and
• forming a protecting layer on the interconnection layer and the sealing ring stack layer;
• wherein the step of forming the sealing ring stack layer comprises:
• forming a plurality of sealing metal layers aver the sealing base layer;
• forming a plurality of sealing dielectric layers respectively between the sealing metal layers;
• and
• forming a plurality of sealing connection parts respectively within the sealing dielectric layers and connecting the sealing connection parts with sealing metal layers;
• wherein the step of forming the interconnection layer comprises:
• forming a plurality of metal layers over the device layer;
• forming a plurality of dielectric layers respectively between the metal layers;
• and
• forming a plurality of interconnections respectively within the dielectric layers to electrically connect with the metal layers;
• wherein the step of forming the sealing base layer and the sealing part comprises:
• forming a sealing base hole and at least one sealing part hole on the substrate;
• and
• filling a metal material into the sealing base hole and the sealing part hole.