Trench and a trench capacitor and method for forming the same

A method of fabricating an integrated circuit, the method comprising:

• etching a trench into a surface of a semiconductor substrate, wherein a trench wall is exposed;
• forming at least one layer on the trench wall, wherein a topmost layer comprises a sealing layer made of a sealing material;
• performing a selective epitaxy method in such a way that a monocrystalline semiconductor layer is formed on the surface of the semiconductor substrate;
• etching a partial trench in a surface of the epitaxially grown semiconductor layer, wherein at least part of the sealing layer is uncovered;
• removing the uncovered part of the sealing layer:
• forming at least one layer on a trench wall of the partial trench, wherein a topmost layer comprises a second sealing layer made of a sealing material;
• performing a selective epitaxy method in such a way that a second monocrystalline semiconductor layer is formed on the surface of the first monocrystalline semiconductor layer;
• etching a second partial trench in a surface of the second monocrystalline semiconductor layer such that at least part of the second sealing layer is uncovered;
• and
• removing the uncovered part of the second sealing layer.

A method for fabricating an integrated circuit comprising a trench capacitor, the method comprising:

• etching a trench into a surface of a semiconductor substrate, wherein a trench wall is exposed;
• forming at least one layer on the trench wall, wherein a topmost layer is a sealing layer made of a sealing material;
• performing a selective epitaxy method in such a way that a monocrystalline semiconductor layer is formed on the surface of the semiconductor substrate;
• etching a partial trench in a surface of the epitaxially grown semiconductor layer, wherein at least part of the sealing layer is uncovered;
• removing the uncovered part of the sealing layer;
• forming a bottom capacitor electrode in the semiconductor substrate and the epitaxially grown semiconductor layer;
• forming a capacitor dielectric adjacent the bottom capacitor electrode;
• and
• forming a top capacitor electrode adjacent the capacitor dielectric, wherein the capacitor dielectric and the top capacitor electrode are arranged at least partly in the trench and the partial trench.