Method of making FUSI gate and resulting structure

A method of forming a transistor comprising:

• forming on a substrate a gate stack including a gate dielectric, a first polysilicon layer, an etch stop layer, and second polysilicon layer, wherein the first polysilicon layer has a height of about one third to about eighty percent of the gate stack height;
• forming at least partly in the substrate source and drain regions, respectively, on opposite sides of the gate stack;
• siliciding at least a portion of a top surface of the source and drain regions;
• covering the source and drain regions and exposing a top surface of the gate stack;
• removing the second polysilicon layer and the etch stop layer;
• and
• substantially fully siliciding the first polysilicon layer.

A method of forming a device comprising:

• forming a gate electrode on a substrate, the gate electrode comprising a first sub-layer and a second sub-layer atop the first sub-layer and wherein the first sub-layer has high etch selectivity relative the second sub-layer;
• forming a pair of spacers adjacent to opposite sidewalls of the gate electrode, wherein a height of the gate electrode is at least one third a height of the spacers;
• forming a metal layer over the gate electrode;
• and
• forming a silicide by reacting the gate electrode with the metal layer.