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US 7,408,248 B2Granted
Lead frame for semiconductor device
AssigneeShinko Electric Industries Co., Ltd.
InventorsKazumitsu Seki, Takashi Yoshie, Koichi Kadosaki
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AssigneeShinko Electric Industries Co., Ltd.
InventorsKazumitsu Seki, Takashi Yoshie, Koichi Kadosaki
Estimating the term…
A lead frame for semiconductor device is provided with an inner lead part and an outer lead part. A composite plating layer is provided on the entire plane of a base material constituting the lead frame or at least on the outer lead part. The composite plating layer includes a base layer composed of an Ni-based plating layer formed on the entire plane of the base material constituting the lead frame or at least on the outer lead part, a Pd or Pd alloy plating layer formed on an upper plane of the base layer with a thickness of 0.005-0.01 μm, and an Au plating layer formed on an upper plane of the Pd or Pd alloy plating layer with a thickness of 0.02-0.1 μm. The lead frame for semiconductor device has a Pd-PPF structure. In the case of mounting a semiconductor device on a board and the like with a lead-free Sn—Zn based solder or other lead-free solders by using the lead frame, wettability of the lead frame with the lead-free Sn—Zn based solder or other lead-free solders is improved and mountability of the semiconductor device can be improved.
A lead frame for use in a semiconductor device comprising inner leads and outer leads, wherein a whole surface of the substrate constituting the lead frame or at least the outer leads has a composite plated layer applied thereon, and the composite plated layer comprises an underlayer consisting of an Ni-based plating layer deposited on the whole surface of the substrate constituting the lead frame or on at least the outer leads, a Pd— or Pd alloy-plating layer deposited at a thickness of 0.005 to 0.01 μm on an upper surface of the underlayer, and an Ag— or Ag—Au alloy-plating layer of a thickness of not larger than 0.03 μm and an Au-plating layer of a thickness of not larger than 0.03 μm successively deposited on an upper surface of the Pd— or Pd alloy-plating layer.
A lead frame for use in a semiconductor device comprising inner leads and outer leads, wherein a whole surface of the substrate constituting the lead frame or at least the outer leads has a composite plated layer applied thereon, and the composite plated layer comprises an underlayer consisting of an Ni-based plating layer deposited on the whole surface of the substrate constituting the lead frame or on at least the outer leads, a Pd— or Pd alloy-plating layer deposited at a thickness of 0.005 to 0.01 μm on an upper surface of the underlayer, and Ag-plating layers and Au-plating layers each having a thickness of 0.02 to 0.2 μm, alternately deposited on an upper surface of the Pd— or Pd alloyplating layer.
Dependencies are inferred from the claim text.