Memory device
AssigneeInfineon Technologies AG
InventorShoaib Hasan Zaidi
Life of this patent
Estimating the term…
Abstract
A phase change memory cell is disclosed. The phase change memory cell includes a first thin film spacer and a second thin film spacer. The first thin film spacer defines a sub-lithographic dimension and is electrically coupled to a first electrode. The second thin film spacer defines a sub-lithographic dimension and is electrically coupled between a second electrode and the first thin film spacer. In this regard, the phase change memory cell is formed at a boundary where the first thin film spacer electrically contacts the second thin film spacer.
Claims20
An integrated circuit having a resistivity changing cell comprising:
- a first thin film spacer defining a sub-lithographic dimension and electrically coupled to a first electrode;
- and
- a second thin film spacer defining a sub-lithographic dimension;
- wherein the resistivity changing cell is formed at a boundary where the first thin film spacer electrically contacts the second thin film spacer;
- and
- wherein the first thin film spacer comprises one of titanium nitride and a resistivity changing material.
A memory device comprising:
- an array of phase change memory cells disposed on a chip and defined by:
- a plurality of first spacers extending in a first direction, each first spacer defining a sub-lithographic dimension and in electrical contact with a respective first electrode;
- and
- a plurality of second spacers extending in a second direction non-parallel to the first direction, each second spacer including phase change material and defining a sub-lithographic dimension, each second spacer in electrical contact with a respective second electrode and a respective one of the first spacers;
- wherein a phase change memory cell is formed at each intersection of each respective first spacer with each respective second spacer.
An electronic system comprising:
- an electronic device;
- and
- a memory device electrically coupled to the electronic device, the memory device comprising at least one phase change memory cell defining:
- a first thin film spacer defining a sub-lithographic dimension and electrically coupled to a first electrode,
- a second thin film spacer defining a sub-lithographic dimension and electrically coupled between a second electrode and the first thin film spacer;
- wherein the at least one phase change memory cell is formed at a boundary where the first thin film spacer electrically contacts the second thin film spacer;
- and
- wherein the first thin film spacer comprises one of titanium nitride and a resistivity changing material.
An integrated circuit having a resistivity changing cell comprising:
- a first thin film spacer defining a sub-lithographic dimension and electrically coupled to a first electrode;
- and
- a second thin film spacer defining a sub-lithographic dimension;
- wherein the resistivity changing cell is formed at a boundary where the first thin film spacer electrically contacts the second thin film spacer;
- and
- wherein the boundary where the first thin film spacer electrically contacts the second thin film spacer defines a sub-lithographic contact area of between approximately 18-22 nanometers square.
An integrated circuit having a resistivity changing cell comprising:
- a first thin film spacer defining a sub-lithographic dimension and electrically coupled to a first electrode;
- and
- a second thin film spacer defining a sub-lithographic dimension;
- wherein the resistivity changing cell is formed at a boundary where the first thin film spacer electrically contacts the second thin film spacer;
- and
- wherein the first thin film spacer defines a first sidewall and the second thin film spacer defines a second sidewall, and further wherein the first sidewall is orthogonal to the second sidewall and the first thin film spacer is disposed at a tilt angle relative to the second thin film spacer.
An integrated circuit having a resistivity changing cell comprising:
- a first thin film spacer defining a sub-lithographic dimension and electrically coupled to a first electrode;
- and
- a second thin film spacer defining a sub-lithographic dimension;
- wherein the resistivity changing cell is formed at a boundary where the first thin film spacer electrically contacts the second thin film spacer;
- and
- wherein the first thin film spacer is disposed at a tilt angle of between 70-110 degrees relative to the second thin film spacer, and further wherein the first thin film spacer contacts the second thin film spacer across an area of between approximately 18-22 nanometers square.
Dependencies are inferred from the claim text.