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US 7,408,215 B2Granted
Dynamic random access memory
AssigneeNanya Technology Corporation
InventorsMing-Cheng Chang, Neng-Tai Shih
Life of this patent
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Abstract
A DRAM structure on a silicon substrate has an active area, gate conductors, deep trench capacitors, and vertical transistors. The deep trench capacitors are formed at intersections of the active area and the gate conductors, and each deep trench capacitor is coupled electrically to the corresponding vertical transistor to form a memory cell. The transistor includes a gate, a source in a lateral side of the gate, and a drain in another lateral side of the gate The depth of the drain is different from the depth of the source.
Claims8
A dynamic random access memory (DRAM) on a silicon substrate, comprising:
- at least an active area on the silicon substrate;
- a plurality of gate conductors on the silicon substrate;
- a plurality of deep trench capacitors, each deep trench capacitor is positioned in the silicon substrate at respective intersections of the plurality of gate conductors and the active area;
- and
- a plurality of vertical transistors in the silicon substrate, each vertical transistor is coupled to each respective deep trench capacitor to form a memory cell, each vertical transistor further comprising:
- a gate;
- a source in one side of the gate;
- and
- a drain in another side of the gate, a depth of the source is different from a depth of the drain.
6 more elements
Dependencies are inferred from the claim text.