Method and apparatus for leveling a semiconductor wafer, and semiconductor wafer with improved flatness
AssigneeSiltronic AG
InventorsTheresia Bauer, Robert Hoelzl, Andreas Huber, Reinhold Wahlich
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AssigneeSiltronic AG
InventorsTheresia Bauer, Robert Hoelzl, Andreas Huber, Reinhold Wahlich
Estimating the term…
Semiconductor wafers are leveled by position-dependent measurement of a wafer-characterizing parameter to determine the position-dependent value of this parameter over an entire surface of the semiconductor wafer, etching the entire surface of the semiconductor wafer simultaneously under the action of an etching medium with simultaneous illumination of the entire surface, the material-removal etching rate dependent on the light intensity at the surface of the semiconductor wafer, the light intensity being established in a position-dependent manner such that the differences in the position-dependent values of the parameter measured in step a) are reduced by the position-dependent material-removal rate. Semiconductor wafers with improved flatness and nanotopography, and SOI wafers with improved layer thickness homogeneity are produced by this process.
A method for improving the geometry of a semiconductor wafer having a device surface and a back surface, prior to fabrication of electronic devices on the device surface, the wafer having at least one of thickness variation, edge roll-off, global flatness or local flatness as geometry imperfections, comprising:
Dependencies are inferred from the claim text.