Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device, the method comprising:

• forming an insulating layer, a first conductive layer, a dielectric layer and a capping conductive layer over a semiconductor substrate in which a cell region and a peri region are defined;
• etching the capping conductive layer and the dielectric layer to form contact holes in a drain select line and a source select line region of the cell region, and in a region of a portion of regions in which a register gate is not formed in the peri region;
• forming a second conductive layer, a tungsten silicide layer and a hard mask layer over the semiconductor substrate including the contact holes;
• etching the hard mask layer, the tungsten silicide layer, the second conductive layer, the capping conductive layer, the dielectric layer and the first conductive layer to form a cell gate in the cell region, and a gate for low voltage and high voltage and a register gate, in the peri region;
• and
• etching the hard mask layer, the tungsten silicide layer, the second conductive layer and the first conductive layer to form a drain select line and a source select line in the cell region, while etching the hard mask layer, the tungsten silicide layer, the second conductive layer and a portion of the capping conductive layer to form a contact in the register gate.