Method of manufacturing EEPROM device

Abstract

A method of manufacturing an EEPROM device can reduce the cell area. The method of manufacturing an Electrically Erasable Programmable Read-Only Memory (EEPROM) includes forming a mask pattern over a semiconductor substrate; forming a gate oxide layer over a top of the semiconductor substrate exposed through the mask pattern; forming access gates which are self-aligned with both side walls of the mask pattern, over a top of the gate oxide layer; removing the mask pattern; forming first dielectric spacers to be attached to side walls of the access gates; forming an insulating layer adapted to cover the access gates and the first dielectric spacers; and forming two cell gates, which are self-aligned with opposite side walls of the two access gates, respectively, each first dielectric spacer being interposed between a corresponding cell gate and a corresponding access gate, the cell gates separately arranged over a top of the insulating layer.

Dependencies are inferred from the claim text.