Single and composite binary and multi-valued logic functions from gates and inverters
AssigneeTernarylogic LLC
InventorPeter Lablans
Life of this patent
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Abstract
Gates or switches for use in circuits implementing ternary and multi-value functions are disclosed. The gates can be optical, mechanical or electrical. The gates can conduct or not conduct when a control input assumes one of multiple states, or when a control input assumes two or more of multiple states. Circuits and methods for implementing ternary and multi-value functions are also disclosed. Corrective design techniques that can be used when a logic expression is incorrectly realized are also disclosed. Circuits that use inverters and gates to realize logic expressions are also provided.
Claims9
A device implementing an n-valued logic function with n>2, comprising:
- an n-valued switch having an input and an output and a control input, wherein:
- the input is enabled to receive a signal having one of n states;
- the input is connected to the output whenever the control input is in a first of n-states;
- and
- the input is isolated from the output whenever the control input is not in a first of n-states;
- and
- an n-valued inverter.
A method for implementing an n-valued logic function with n>2, having an n by n truth table with n rows and n columns comprising:
- implementing a row of the n by n truth table by an n-valued inverter;
- and
- enabling the n-valued inverter by an n-valued switch having a control input.
A device implementing an n-valued logic function with n>2 having 2 inputs and 1 output which is determined by a truth table, comprising:
- an n-valued switch including an input, a control input and an output, the input enabled to receive a signal representing one of n logic states, the control input enabled to receive a signal representing one of n logic states and the output enabled to provide a signal representing one of n logic states, wherein:
- the output of the n-valued logic switch provides a signal representing the one of n logic states represented by the signal received at the input of the n-valued switch whenever the control input receives a signal representing a first of n logic states;
- and
- the output of the n-valued logic switch provides a signal that corresponds with an absence of signal at the input, whenever the control input receives a signal not representing a first of n logic states.
Dependencies are inferred from the claim text.