Nitride semiconductor device and manufacturing method thereof
AssigneeNew Japan Radio Co., Ltd.
InventorsAtsushi Nakagawa, Eiji Waki
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AssigneeNew Japan Radio Co., Ltd.
InventorsAtsushi Nakagawa, Eiji Waki
Estimating the term…
A nitride semiconductor device enabiling to supress current collapse and manufacturing method thereof including a III-V group nitride semiconductor layer formed of III group elements includes at least one element from the group consisting of gallium, aluminum, boron and indium, and V group elements including at least nitrogen from the group consisting of nitrogen, phosphorous and arsenic, comprising a first nitride semiconductor layer made of said III-V group nitride semiconductor layer deposited on a substrate, a second nitride semiconductor layer comprising said III-V group nitride semiconductor layer and a control electrode making Schottky contact with the first nitride semiconductor layer being exposed through removing a portion of the second semiconductor layer.
A nitride semiconductor device, comprising a III-V group nitride semiconductor layer formed of III group elements including at least one element from the group consisting of gallium, aluminum, boron and indium, and V group elements including at least nitrogen from the group consisting of nitrogen, phosphorous and arsenic, comprising a first nitride semiconductor layer made of said III-V group nitride semiconductor layer deposited on a substrate, a second nitride semiconductor comprising said III-V group nitride semiconductor layer deposited on the first nitride semiconductor layer and not including aluminum, and a control electrode making Schottky contact with said first nitride semiconductor layer being exposed through a portion of the second nitride semiconductor layer that has been removed, wherein said second nitride semiconductor layer is made of crystallinity with minute grains,
A nitride semiconductor device, comprising a III-V group nitride semiconductor layer form of III group elements including at least one element from the group consisting of gallium, aluminum, boron and indium, and V group elements including at least nitrogen from the group consisting of nitrogen, phosphorous and arsenic, comprising a first nitride semiconductor layer made of said III-V group nitride semiconductor layer deposited on a substrate, a second nitride semiconductor comprising said III-V group nitride semiconductor layer deposited on the first nitride semiconductor layer and not including aluminum, and a control electrode making Schottky contact with said first nitride semiconductor layer being exposed through a portion of the second nitride semiconductor layer that has been removed, wherein said second nitride semiconductor layer is made of a film of which the film formation temperature is lower than that of said first nitride semiconductor layer,
Dependencies are inferred from the claim text.
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Manufacture or treatment: of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
Having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs: having wide bandgap…
Being Group III-V materials, e.g. GaAs: nitride Group III-V materials, e.g. AlN or GaN
Inorganic electric semiconductor devices
Term ended 18 Nov 2025 (estimated)
The present invention relates to a nitride semiconductor device where a nitride semiconductor is used as an active layer and a manufacturing method for the same, and in particular, to a nitride semiconductor device having, a control electrode that makes Schottky contact with the semiconductor device, such as a high electron mobility transistor (HEMT) and a field effect transistor (FET), and a manufacturing method thereof.
FIG. 6 is a cross sectional diagram of a semiconductor device made of a conventional III-V group nitride semiconductor. The semiconductor device shown in FIG. 6 has a so-called HEMT structure where a buffer layer 102 made of gallium nitride (GaN), a channel layer 103 made of gallium nitride, a charge supply layer 104 made of n type aluminum gallium nitride (AlGaN) and a Schottky layer 105 made of undoped aluminum gallium nitride are sequentially deposited on a substrate 101 made of a sapphire substrate, where a two-dimensional electron gas layer made of a potential well and having an extremely high electron mobility is formed in the vicinity of the interface where the channel layer 103 and the charge supply layer 104 form a hetero junction. In the semiconductor device having such a structure, a voltage that is applied to a gate electrode 106 (control electrode) that makes Schottky contact with the Schottky layer 105 is controlled, and thereby, carriers (two-dimensional electron gas) that flow between a source electrode 107a and a drain electrode 107b are controlled.
A variety of structures as disclosed in, for example, Japanese Unexamined Patent Publication No. 335637/1998, in addition to the above described structure.
FIG. 1 is a diagram showing Embodiment 1 of the present invention;
FIGS. 2(a) to 2(d) are graphs showing the drain current-voltage properties of Embodiment 1 of the present invention;
FIGS. 3(a) to 3(d) are graphs showing the drain current-voltage properties of a conventional nitride semiconductor device;
The nitride semiconductor device of the present invention is explained in detail in following.
FIG. 1 is a cross sectional diagram of a HEMT which is a III-V group nitride semiconductor device according to Embodiment 5 of the present invention. As shown in FIG. 1, a buffer layer 12 made of nitride gallium (GaN) and having a thickness of approximately 30 nm, a channel layer 13 having an energy gap that is smaller than the energy gap of the below described charge supply layer, a thickness of 2 μm and made of undoped gallium nitride (GaN), a charge supply layer 14 having a thickness of 15 nm and made of n type aluminum gallium nitride (AlGaN) where a two-dimensional electron gas layer which becomes carriers is formed in the interface between the channel layer 13, and a Schottky layer 15 having a thickness of 3 nm and made of undoped aluminum gallium nitride (AlGaN), and a cap layer 16 having a thickness of 10 nm and made of undoped gallium nitride (GaN) having crystallinity with minute grains are formed and deposited on a substrate 11 made of sapphire. A portion of the cap layer 16 is removed, and thus, a recess through which the Schottky layer 15 is exposed is created. A gate electrode 17 made of a deposited body of nickel (Ni)/gold (Au) is formed on the Schottky layer 15 that is exposed within the recess, which is a region where a gate electrode is planned to be formed, so as to make Schottky contact with the Schottky layer 15. In addition, a source electrode 18a and a drain electrode 18b are formed of titanium (Ti)/aluminum (Al) on the Schottky layer 15 that is exposed within the recess, which is the region where the source electrode and the drain electrode are planned to be formed, so as to make ohmic contact with the charge supply layer 14.
The Cap layer 16 having crystallinity with minute grains is formed as a film at a temperature that is lower than the film formation temperature of the charge supply layer 14 and the Schottky layer 15 by approximately 500° C. according to an MOCVD (metal organic chemical vapor deposition) method, an MBE (Molecular Beam Epitaxy) method or the like, and thereby, becomes a semiconductor layer having high insulation. Concretely speaking, the cap layer 16 has a high resistance, where the sheet resistance is 109 Ω/□ or higher.