Method of editing a semiconductor die
AssigneeNational Semiconductor Corporation
InventorsKevin Weaver, Henry Acedo, Lakshmi Durbha
Life of this patent
Estimating the term…
Abstract
Resistance and capacitance are added to a prototype die to fix or identify performance issues with the integrated circuit formed in the die by forming a thin piece of silicon on the top surface of the die. For resistance, vias are formed to regions on the metal traces and to opposite ends of the piece of silicon using a FIB system. For capacitance, a dielectric is formed on the piece of silicon, and a layer of metal is formed on the dielectric. Vias are formed to regions on the metal traces, to the piece of silicon, and to the layer of metal using the FIB system.
Claims19
A method of editing a semiconductor die, the semiconductor die having:
- a semiconductor structure that includes a substrate and a plurality of devices that are formed in and on the substrate;
- and
- an interconnect structure connected to the semiconductor structure to electrically interconnect the devices to realize a circuit, the interconnect structure having a top surface, a number of metal traces, and a non-conductive structure that contacts the semiconductor structure and each metal trace, the number of metal traces including a first metal trace and a second metal trace,
- the method comprising:
- attaching an external structure to the top surface of the interconnect structure of the die, the external structure including silicon;
- forming a first opening in the non-conductive structure to expose a first metal region on a metal trace that lies between the first metal trace and the semiconductor structure;
- and
- forming a first conductor, the first conductor contacting the external structure and lying in the first opening to contact the first metal region.
A method of editing a semiconductor die, the semiconductor die having:
- a semiconductor structure that includes a substrate and a plurality of devices that are formed in and on the substrate;
- and
- an interconnect structure connected to the semiconductor structure to electrically interconnect the devices to realize a circuit, the interconnect structure having a top surface, a number of metal traces, and a non-conductive structure that contacts the semiconductor structure and each metal trace, the number of metal traces including a first metal trace and a second metal trace,
- the method comprising:
- attaching an external structure to the top surface of the interconnect structure of the die, the external structure including a concentration of dopant atoms;
- forming a first opening in the non-conductive structure to expose a first metal region on a metal trace that lies between the first metal trace and the semiconductor structure;
- and
- forming a first conductor, the first conductor contacting the external structure and lying in the first opening to contact the first metal region.
A method of editing a semiconductor die, the semiconductor die having:
- a semiconductor structure that includes a substrate and a plurality of devices that are formed in and on the substrate;
- and
- an interconnect structure connected to the semiconductor structure to electrically interconnect the devices to realize a circuit, the interconnect structure having a top surface, a number of metal traces, and a non-conductive structure that contacts the semiconductor structure and each metal trace, the number of metal traces including a first metal trace and a second metal trace,
- the method comprising:
- attaching an external structure to the top surface of the interconnect structure of the die;
- forming a first opening in the non-conductive structure to expose a first metal region on a metal trace that lies between the first metal trace and the semiconductor structure;
- forming a first conductor, the first conductor contacting the external structure and lying in the first opening to contact the first metal region;
- forming a dielectric region that is connected to the external structure and the first conductor;
- forming a second opening in the non-conductive structure to expose a second metal region on a metal trace;
- and
- forming a second conductor, the second conductor contacting the dielectric region, lying over the external structure, and lying in the second opening to contact the second metal region, the second conductor being electrically isolated from the external structure.
A method of editing a semiconductor die, the semiconductor die having:
- a semiconductor structure that includes a substrate and a plurality of devices that are formed in and on the substrate;
- and
- an interconnect structure connected to the semiconductor structure to electrically interconnect the devices to realize a circuit, the interconnect structure having a top surface, a number of metal traces, and a non-conductive structure that contacts the semiconductor structure and each metal trace,
- the method comprising:
- attaching a piece of silicon to only a non-conductive region of the top surface of the interconnect structure of the die;
- forming a first opening in the non-conductive structure to expose a first metal region of a metal trace;
- and
- forming a first conductor, the first conductor contacting the piece of silicon and lying in the first opening to contact the first metal region.
Dependencies are inferred from the claim text.