Structured ASIC device with configurable die size and selectable embedded functions
AssigneeAMI Semiconductor, Inc.
InventorRobert S. Kirk
Life of this patent
Estimating the term…
Abstract
One embodiment of the present invention provides for a master or universal base and base tooling which addresses the general purpose Structured ASIC requirements. Another embodiment of the present invention provides for a common set of base tooling from which the master/universal base is created as well as additional custom bases with customized selection and quantity of embedded Platform ASIC functions. Embodiments can utilize conventional Structured ASIC architecture and processing and are compatible with traditional probing and packaging.
Claims48
A customized wafer that can be used to implement a customized application, the customized wafer comprising the following:
- at least one base layer configured in a repeating base pattern of individual die such that different configurations of custom layers can be added on top of the at least one base layer to implement different customized applications, the repeating base pattern of individual die including scribe line regions defining boundaries of each die, the scribe line regions including a guard ring that performs one or more of the following functions should the scribe line region be scribed:
- 1) protects the individual die from destructive effects of scribing, 2) protects the edge of the individual die from cracking caused by scribing, 3) protects the edge of the individual die from contaminates entering at the edge of the individual die, 4) provides a common collection ring for stray currents that occur when the individual die is performing its operational functions;
- at least one custom layer of a die cluster on top of the repeating base pattern of individual die, the die cluster grouping the resources of one or more individual die contained in the die cluster to implement the customized application;
- and
- one or more interconnections between the at least one base layer and the at least one custom layer such that the resources in the at least one custom layer can interoperate with resources in the at least one base layer to implement the customized application.
A customized wafer that can be used to implement a customized application, the customized base wafer comprising the following:
- at least one base layer configured in a repeating base pattern of individual die, each repeating base pattern of individual die including one or more different die types, the repeating base pattern of individual die including scribe line regions defining boundaries of each die, the scribe line regions including a guard ring that performs one or more of the following functions should the scribe line region be scribed:
- 1) protects the individual die from destructive effects of scribing, 2) protects the edge of the individual die from cracking caused by scribing, 3) protects the edge of the individual die from contaminates entering at the edge of the individual die, 4) provides a common collection ring for stray currents that occur when the individual die is performing its operational functions;
- at least one custom layer of a die cluster on top of the repeating base pattern of individual die, the die cluster grouping the resources of one or more individual die contained in the die cluster to implement the customized application;
- and
- one or more interconnections between the at least one base layer and the at least one custom layer such that the resources in the at least one custom layer can interoperate with resources in the at least one base layer to implement the customized application.
The customized wafer as recited in 17, wherein scribe line regions include a repeating pattern of one or more scribe line artifacts, the locations of the one or more scribe line artifacts based on pre-defined scribe lines so as to reduce interference with custom layers.
A method for customizing a base wafer to implement customized applications, the method comprising:
- an act of providing at least one base layer configured in a repeating base pattern of individual die such that different configurations of custom layers can be added on top of the at least one base layer to implement different customized applications, the repeating base pattern of individual die including scribe line regions defining boundaries of each die, the scribe line regions including a guard ring that performs one or more of the following functions should the scribe line region be scribed:
- 1) protects the individual die from destructive effects of scribing, 2) protects the edge of the individual die from cracking caused by scribing, 3) protects the edge of the individual die from contaminates entering at the edge of the individual die, 4) provides a common collection ring for stray currents that occur when the individual die is performing its operational functions;
- an act of providing at least one custom layer of a die cluster on top of the repeating base pattern of individual die, the die cluster grouping the resources of one or more individual die contained in the die cluster to implement the customized application;
- and
- an act of providing one or more interconnections between the at least one base layer and the at least one custom layer such that the resources in the at least one custom layer can interoperate with resources in the at least one base layer to implement the customized application.
Dependencies are inferred from the claim text.