Deferred queuing in a buffered switch

A deferred queue device for temporarily deferring transmission of packets/frames to a destination port in a buffered switch, comprising:

• a deferred header queue device for storing frame information for packets/frames being deferred, the deferred header queue device containing information for packets/frames addressed to more than one destination port;
• means for periodically determining current status of all destination ports in the buffered switch;
• and
• header select logic unit for determining state of the deferred queue device and supplying a valid buffer address for a deferred packet/frame which can now be sent to an available destination port.

A method for temporarily deferring transmission of data to a destination port in a buffered switch, comprising the steps of:

• a. during an initial state:
• i. receiving a request for transmission of data to the destination port;
• ii. determining whether the destination port is available to receive the data;
• iii. deferring transmission of the data when the determining step determines that the destination port is not available to receive the data by storing entries including destinations for the data to be deferred in a deferred header queue simultaneously containing entries corresponding to data addressed to different destination ports;
• iv. transmitting data to the destination port when the determining step determines the destination port is available to receive the data;
• and
• v. repeating the above steps i–iv for all data to be transmitted;
• b. upon receiving notification that a destination port has changed state and may now receive data, entering into a deferred state during which:
• i. all entries in the deferred header queue are analyzed in the order in which the entries were added to the deferred header queue;
• ii. upon determining that the destination port for an entry in the deferred header queue is now able to receive data, transmitting the corresponding deferred data to the destination port;
• iii. upon determining the destination port for an entry in the deferred header queue is still not able to receive data, ensuring the entry corresponding to the data remains in the deferred header queue;
• and
• iv. repeating steps i–iii for all entries in the deferred header queue.

A data switch having a plurality of output ports, each output port having a positive or negative transmission status;

• the switch comprising:
• a. an input buffer receiving a plurality of data frames each associated with an output port;
• b. a mechanism at each input buffer to determine the transmission status of the output port;
• c. a deferred header queue in which destination entries for data for a plurality of different output ports having a negative transmission status are tracked;
• d. a backup header queue in which destination entries for newly received data are queued when destination entries in the deferred header queue are being processed;
• and
• e. a state machine that enters a deferred state when an output port moves from a negative to a positive transmission status, the deferred state causing the data switch:
• i. to process destination entries in the deferred header queue so as to transmit to the associated output port that data which is addressed to an output port that now has a positive transmission status,
• ii. to ensure that destination entries in the deferred header queue addressed to output ports that still have a negative transmission status remain in the deferred header queue, and
• iii. to place destination entries for newly received data in the backup header queue.

A data switch having a plurality of destination ports comprising:

• a deferred header queue that stores destination entries for data being deferred, the deferred header queue containing entries for data addressed to more than one destination port;
• and
• a logic unit having an initial state and a deferred state,
• in the initial state the logic unit transmits data to non-blocked destination ports and adds destination entries for data to the deferred header queue where that data is addressed to a blocked destination port, and
• in the deferred state the logic unit processes destination entries in the deferred header queue by transmitting to its destination port the corresponding deferred data that is addressed to a no longer blocked destination port, and by retaining within the deferred header queue destination entries for data that are addressed to still-blocked destination ports.