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US 7,257,779 B2Granted
Sea-of-cells array of transistors
AssigneeMagnaChip Semiconductor, Ltd.
InventorHarold S. Crafts
Life of this patent
Estimating the term…
Abstract
The invention concerns integrated circuits in which a MACRO is embedded in a standard cell array. One level of metal is devoted exclusively to non-local interconnect, and a layer of polysilicon is devoted to local interconnect, thereby saving significant space.
Claims15
A method of constructing an integrated circuit that includes multiple physical layers of interconnect, the method comprising:
- providing at least one physical layer of interconnect consisting essentially of local interconnect;
- providing at least one physical layer of interconnect consisting essentially of global interconnect;
- providing different spacings between adjacent interconnect traces on one of said physical layers;
- providing a MACRO, for use as a part of the integrated circuit;
- and
- utilizing a second layer of metallization comprising no local interconnect as part of said MACRO.
3 more elements
A method of constructing multiple physical layers of interconnect in an integrated circuit, the method comprising:
- providing a physical layer of interconnect comprising local interconnect and having no global interconnect;
- providing a second physical layer of interconnect comprising local interconnect;
- providing an insulator layer at least partially between the physical layer of interconnect and the second physical layer of interconnect;
- providing a MACRO, for use as a part of the integrated circuit;
- and
- utilizing a second layer of metallization comprising no local interconnect as part of said MACRO.
3 more elements
A method of constructing multiple physical layers of interconnect in an integrated circuit, the method comprising:
- providing a physical layer of interconnect comprising local interconnect and having no global interconnect;
- providing a second physical layer of interconnect comprising local interconnect;
- providing a third physical layer of interconnect comprising global interconnect and comprising no local interconnect
- providing a MACRO, for use as apart of the integrated circuit;
- and
- utilizing a second layer of metallization comprising no local interconnect as part of said MACRO.
3 more elements
Dependencies are inferred from the claim text.