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US 7,256,453 B2Granted
Semiconductor device
AssigneeHitachi, Ltd.
InventorsHidekatsu Onose, Atsuo Watanabe
Life of this patent
Estimating the term…
Abstract
A structure is provided that ensures a low on-resistance and a better blocking effect. In a lateral type SIT (Static Induction Transistor) in which a first region is used as a p+ gate and a gate electrode is formed on the bottom of the first region, the structure is built such that the p+ gate and an n+ source are contiguous. An insulating film is formed on the surface of an n− channel, and an auxiliary gate electrode is formed on the insulating film. In addition, the auxiliary gate electrode and the source electrode are shorted.
Claims3
A semiconductor device, comprising:
- a silicon carbide semiconductor substrate having a low impurity-density first conductivity type;
- a first region formed on a first major surface of said substrate and having a second conductivity type and a resistance lower than that of said substrate;
- a control electrode formed under said first region;
- a second region formed on a second major surface of said substrate and having the same conductivity type as, and a resistance lower than, that of said substrate;
- a second electrode formed on said second region;
- a third region formed on the second major surface of said substrate and having the same conductivity type as, and a resistance lower than, that of the substrate;
- and
- a third electrode formed on said third region,
- wherein said third region is formed in a region formed by removing a substrate region except said second region, a surface of said third region is at a level lower than a bottom of said second region, said third region is contiguous to a first region, and said second region is formed such that it is exposed on a part of said second major surface.
6 more elements
A semiconductor device, comprising:
- a silicon carbide semiconductor substrate having a low impurity-density first conductivity type;
- a first region formed on a first major surface of said substrate and having a second conductivity type and a resistance lower than that of said substrate;
- a control electrode formed under said first region;
- a second region formed on a second major surface of said substrate and having the same conductivity type as, and a resistance lower than, that of said substrate;
- a second electrode formed on said second region;
- a third region formed on the second major surface of said substrate and having the same conductivity type as, and a resistance lower than, that of the substrate;
- a third electrode formed on said third region,
- wherein said third region is formed in a region formed by removing a substrate region except said second region, a surface of said third region is at a level lower than a bottom of said second region, said third region is contiguous to a first region, and said second region is formed such that it is exposed on a part of said second major surface;
- and
- wherein a fourth electrode is formed via an insulating film on a surface of the lowered substrate and on a surface of said third region and wherein the third electrode and the fourth electrode are shorted.
7 more elements
A semiconductor device, comprising:
- a silicon carbide semiconductor substrate having a low impurity-density first conductivity type;
- a first region formed on a first major surface of said substrate and having a second conductivity type and a resistance lower than that of said substrate;
- a control electrode formed under said first region;
- a second region formed on a second major surface of said substrate and having the same conductivity type as and a resistance lower than, that of said substrate;
- a second electrode formed on said second region;
- a third region formed on the second major surface of said substrate and having the same conductivity type as and a resistance lower than, that of the substrate;
- a third electrode formed on said third region,
- wherein said third region is formed in a region formed by removing a substrate region except said second region, a surface of said third region is at a level lower than a bottom of said second region, said third region is contiguous to a first region, and said second region is formed such that it is exposed on a part of said second major surface;
- and
- wherein an insulating film is formed on a surface of the lowered substrate, a fourth electrode is formed across the insulating film, and said fourth electrode and said third electrode are shorted.
7 more elements
Dependencies are inferred from the claim text.