Three-layer lower capacitor electrode
AssigneeSamsung Electronics Co., Ltd.
InventorCheol-sung Hwang
Life of this patent
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Abstract
A method for forming the lower electrode of a capacitor used for fabricating a 1-Gbit or above DRAM, using a material having a high dielectric constant, is used in a method for manufacturing a storage capacitor of a VLSI semiconductor device. The lower electrode, which is to be in contact with a high dielectric film, is formed to have a triple-structured storage node pattern. The lowest layer of the lower electrode is formed with TiN which serves as a barrier against the diffusion of impurities from a lower substrate. The middle layer of the lower electrode is formed with RuO2 which is easy to pattern. The uppermost layer of the lower electrode is formed with Pt which has excellent leakage current properties.
Claims10
A capacitor adapted for use in a semiconductor device, comprising:
- a first layer in the form of a plate comprising a material that serves as a barrier against the diffusion of impurities from a lower substrate;
- a second layer disposed on a top surface of the first layer, such that side surfaces of the first layer remain exposed, the second layer comprising a material that is easy to pattern;
- and
- a third layer disposed on top and side surfaces of the second layer and on the exposed side surfaces of the first layer, the third layer comprising a material having low leakage current properties.
A semiconductor device, comprising:
- an insulating film disposed on a semiconductor substrate;
- a conductive plug disposed in the insulating film;
- a first layer disposed on the conductive plug and the insulating film, the first layer comprising a material that serves as a barrier against the diffusion of impurities from the conductive plug and the semiconductor substrate;
- a second layer disposed on a top surface of the first layer, such that side surfaces of the first layer remain exposed, the second layer comprising a material that is easy to pattern;
- and
- a third layer disposed on top and side surfaces of the second layer and on the exposed side surfaces of the first layer, the third layer comprising a material having low leakage current properties.
Dependencies are inferred from the claim text.