Nitride layer on a gate stack

A method of forming a semiconductor structure, comprising:

• depositing a nitride layer, on a metallic layer;
• wherein the metallic layer is on a gate layer comprising silicon,
• the gate layer comprises a P+ region and an N+ region, and
• the depositing of the nitride layer is carried out at a temperature and for a time that does not result in a change in the threshold voltage of a PMOS or NMOS device containing the semiconductor structure of more than 20 mV.

A method of making a semiconductor structure, comprising:

• forming a barrier layer on a gate layer on a semiconductor substrate;
• depositing a metallic layer on the barrier layer;
• and
• depositing a nitride layer, on the metallic layer, by PECVD;
• wherein the gate layer comprises silicon and has a P+ region and a N+ region, and
• the depositing of the nitride layer is carried out at a temperature and for a time that does not result in a chance in the threshold voltage of a PMOS or NMOS device containing the semiconductor structure of more than 20 mV.