On chip temperature measuring and monitoring circuit and method
AssigneeInternational Business Machines Corporation
InventorsRobert L. Franch, Keith A. Jenkins
Life of this patent
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Abstract
A device temperature measurement circuit, an integrated circuit (IC) including a device temperature measurement circuit, a method of characterizing device temperature and a method of monitoring temperature. The circuit includes a constant current source and a clamping device. The clamping device selectively shunts current from the constant current source or allows the current to flow through a PN junction, which may be the body to source/drain junction of a field effect transistor (FET). Voltage measurements are taken directly from the PN junction. Junction temperature is determined from measured junction voltage.
Claims22
An integrated circuit (IC) comprising:
- a plurality of devices connected together and forming circuits;
- a switchable current source selectively providing a known current to a PN junction in at least one of said plurality of devices, said switchable current source comprising:
- a constant current source, and a clamping device selectively shunting current from said constant current source;
- a voltage measurement circuit measuring voltage across said PN junction, measured said voltage corresponding to PN junction temperature;
- wherein said plurality of devices includes a plurality of field effect transistors (FETs) and said PN junction is a FET body to source/drain junction;
- and
- wherein said FET body is P-type silicon body layer in a NFET and said NFET is in a CMOS inverter.
A CMOS silicon on insulator (SOI) integrated circuit (IC) chip comprising:
- a plurality of field effect transistors (FETs) connected to form a plurality of CMOS circuits, said plurality of CMOS circuits including a plurality of inverters;
- and
- a ring oscillator including series connected ones of said plurality of inverters, at least one inverter of said ones comprising:
- a constant current source, and
- a clamping device in parallel with said constant current source selectively shunting current from said constant current source to a FET body to source/drain junction in said at least one CMOS circuit;
- and
- a voltage measurement circuit measuring voltage across said PN junction, measured said voltage corresponding to PN junction temperature, wherein said FET body is P-type silicon body layer in a NFET and wherein said ring oscillator further comprises a NAND gate connected in series with said ones, an output of said NAND gate being in phase with an output of said at least one inverter.
A CMOS integrated circuit (IC) comprising:
- a plurality of field effect transistors (FETs) forming CMOS circuits;
- at least one CMOS circuit comprising:
- a constant current source, and a clamping device selectively shunting current from said constant current source to a PN junction in one FET in said at least one CMOS circuit;
- a voltage measurement circuit measuring voltage across said PN junction, measured said voltage corresponding to PN junction temperature;
- wherein said PN junction is a FET body to source/drain junction;
- wherein said CMOS IC is on a silicon on insulator (SOI) IC chip;
- and
- wherein said FET body is P-type silicon body layer in a NFET and said NFET is in a CMOS inverter.
Dependencies are inferred from the claim text.