Semiconductor memory device and method of manufacturing the same
AssigneeKabushiki Kaisha Toshiba
InventorYuki Yamada
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Abstract
A semiconductor memory device includes a semi-conductor substrate, a MOS transistor formed on the semiconductor substrate and including a pair of impurity regions as a source and a drain, and a gate electrode, a first conductive plug formed in contact with an upper surface of one of the pair of impurity regions, and a planar ferroelectric capacitor formed by stacking a lower electrode layer, a ferroelectric layer and an upper electrode layer on the first conductive plug, a side face upper end of the first conductive plug being aligned with a corresponding part of a side face of the ferroelectric capacitor.
Claims10
A semiconductor memory device comprising:
- a semiconductor substrate;
- a MOS transistor formed on the semiconductor substrate and including a pair of impurity regions as a source and a drain, and a gate electrode;
- a first monoblock conductive plug formed in contact with an upper surface of one of the pair of impurity regions and having a planar side face without a step from a side face upper end up to the semiconductor substrate;
- and
- a planar ferroelectric capacitor formed by stacking a lower electrode layer, a ferroelectric layer and an upper electrode layer on the first monoblock conductive plug, the side face upper end of the first monoblock conductive plug being aligned with side faces of the lower electrode layer, the ferroelectric layer and the upper electrode layer of the ferroelectric capacitor formed on the first monoblock conductive plug.
Dependencies are inferred from the claim text.