US 7,253,455 B2Granted

pHEMT with barrier optimized for low temperature operation

AssigneeFreescale Semiconductor, Inc.

InventorsBruce M. Green, Olin L. Hartin, Ellen Y. Lan, Philip H. Li, Monte G. Miller, Matthias Passlack, Marcus R. Ray, Charles E. Weitzel

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Abstract

In one embodiment, a semiconductor device (500) includes a buffer layer (504) formed over a substrate (502). An AlxGa1−xAs layer (506) is formed over the buffer layer (504) and has a first doped region (508) formed therein. An InxGa1−xAs channel layer (512) is formed over the AlxGa1−xAs layer (506). An AlxGa1−xAs layer (518) is formed over the InxGa1−xAs channel layer (512), and the AlxGa1−xAs layer (518) has a second doped region formed therein. A GaAs layer (520) having a first recess is formed over the AlxGa1−xAs layer (518). A control electrode (526) is formed over the AlxGa1−xAs layer (518). A doped GaAs layer (524) is formed over the undoped GaAs layer (520) and on opposite sides of the control electrode (526) and provides first and second current electrodes. When used to amplify a digital modulation signal, the semiconductor device (500) maintains linear operation over a wide temperature range.

Claims13

Dependent claims

A semiconductor device comprising:

a substrate;
a buffer layer formed over the substrate;
a bottom layer comprising AlxGa1−xAs formed over the buffer layer, the bottom layer having a first doped region formed therein, wherein the first doped region comprises a layer of GaAs, a layer of Si, and a layer of GaAs;
an InxGa1−xAs layer formed over the bottom layer;
an AlxGa1−xAs layer formed over the InxGa1−xAs layer, the AlxGa1−xAs layer having a second doped region formed therein, wherein the second doped region comprises a layer of GaAs, a layer of Si, and a layer of GaAs;
an undoped GaAs layer formed over the AlxGa1−xAs layer, the undoped GaAs layer having a first recess formed therein that exposes a portion of the AlxGa1−xAs layer;
a doped GaAs layer formed over the undoped GaAs layer, the doped GaAs layer having a second recess therein that exposes a portion of the undoped GaAs layer;
a control electrode having opposite ends formed within the first recess of the undoped GaAs layer and within the second recess of the doped GaAs layer;
and
first and second current electrodes disposed on the doped GaAs layer proximate opposite ends of the control electrode such that the doped GaAs layer provides current through the first and second current electrodes for the semiconductor device.

7 more elements

An amplifier comprising:

a transistor comprising:
a substrate;
a buffer layer formed over the substrate;
an AlxGa1−xAs layer formed over the buffer layer, the AlxGa1−xAs layer having a first doped region formed therein, wherein the first doped region comprises a layer of GaAs, a layer of Si, and a layer of GaAs;
an InxGa1−xAs layer formed over the AlxGa1−xAs layer;
an AlxGa1−xAs layer formed over the InxGa1−xAs layer, the AlxGa1−xAs layer having a second doped region formed therein, wherein the second doped region comprises a layer of GaAs, a layer of Si, and a layer of GaAs;
an undoped GaAs layer formed over the AlxGa1−xAs layer, the undoped GaAs layer having a first recess formed therein that exposes a portion of the AlxGa1−xAs layer;
a doped GaAs layer formed over the undoped GaAs layer, the doped GaAs layer having a second recess therein that exposes a portion of the undoped GaAs layer;
a control electrode having opposite ends formed within the first recess of the undoped GaAs layer and within the second recess of the doped GaAs layer;
and
first and second current electrodes disposed on the doped GaAs layer proximate opposite ends of the control electrode such that the doped GaAs layer provides current through the first and second current electrodes for the semiconductor device;
a gate bias network coupled to the control electrode of the transistor;
and
a drain bias network coupled to the first current electrode.

11 more elements

Dependencies are inferred from the claim text.