Flash memory cell and method for manufacturing the same

A method for manufacturing a flash memory cell, comprising:

• forming an active region and a trench region on a semiconductor substrate;
• filling the trench region with a dielectric material to form an isolation layer;
• forming a first oxide layer, a first polysilicon layer, a second oxide layer, and a second polysilicon layer on the semiconductor substrate;
• patterning the second polysilicon layer, the second oxide layer, and the first polysilicon layer to form a plurality of gate lines;
• performing deep ion implantation in a deep portion of the active region using a self-aligned source mask;
• exposing the active region and the trench region through the self-aligned source mask by etching the isolation layer between the plurality of gate lines using the self-aligned source mask to form a common source region;
• and
• implanting ions in the common source region using the self-aligned source mask.