Frequency calibration for a monolithic clock generator and timing/frequency reference

An apparatus for frequency calibration of a free-running harmonic oscillator, the oscillator adapted to provide an oscillation signal having an oscillation frequency, the oscillator having a coefficient register, the apparatus couplable to receive a reference signal having a reference frequency, the apparatus comprising:

• a frequency divider couplable to the oscillator to receive the oscillation signal, the frequency divider adapted to divide the oscillation frequency to form an output signal having an output frequency;
• a comparator coupled to the frequency divider, the comparator adapted to compare the output frequency to the reference frequency and to provide a comparison signal when the output frequency is not substantially equal to the reference frequency;
• and
• a reactance modulator coupled to the comparator and couplable to the oscillator, the reactance modulator adapted to determine and provide to the coefficient register a first plurality of coefficients to control switching of a first subset of the plurality of switchable reactance modules to increase the reactance of the oscillator when the comparison signal indicates the output frequency is greater than the reference frequency, and to determine and provide to the coefficient register a second plurality of coefficients to control switching of a second subset of the plurality of switchable reactance modules to decrease the reactance of the oscillator when the comparison signal indicates the output frequency is less than the reference frequency.

A method for frequency calibration of an oscillator, the oscillator having a plurality of switchable reactance modules, the method comprising:

• dividing an oscillation frequency of an oscillation signal provided by the oscillator by a rational fraction to form an output signal having an output frequency;
• comparing the output frequency to a reference frequency of a reference signal provided by a reference oscillator;
• providing a comparison signal when the output frequency is not substantially equal to the reference frequency;
• determining a first plurality of coefficients to control switching of a first subset of the plurality of switchable reactance modules to increase a reactance of the oscillator when the comparison signal indicates the output frequency is greater than the reference frequency;
• and
• determining a second plurality of coefficients to control switching of a second subset of the plurality of switchable reactance modules to decrease the reactance of the oscillator when the comparison signal indicates the output frequency is less than the reference frequency.

An apparatus for frequency calibration of a free-running harmonic oscillator, the oscillator adapted to provide an oscillation signal having a oscillation frequency, the oscillator having a coefficient register, the apparatus couplable to receive a reference signal having a reference frequency, the apparatus comprising:

• a frequency divider couplable to the oscillator to receive the oscillation signal, the frequency divider adapted to divide the oscillation frequency to form an output signal having an output frequency;
• a first counter coupled to the frequency divider to receive the output signal, the first counter adapted to provide a first count signal when a predetermined terminal count is reached;
• a second counter couplable to the reference oscillator to receive the reference signal, the second counter adapted to provide a second count signal when the predetermined terminal count is reached;
• a state detector coupled to the first counter and to the second counter, the state detector adapted to provide a reactance increase signal when the first count signal is received, to provide a reactance decrease signal when the second count signal is received, to provide no output signal when both the first count signal and the second count signal are received, and to reset the first counter and the second counter when the first count signal or the second count signal is received;
• a third counter coupled to the state detector, the third counter adapted to increase a previous count to form a current count in response to the reactance increase signal and to decrease the previous count to form the current count in response to the reactance decrease signal;
• and
• a next state detector coupled to the third counter, the next state detector adapted to determine an output count equal to the previous count when the current count and the previous count are each a corresponding threshold count, to determine the output count equal to the current count when the previous count is not the corresponding threshold count or when the current count is not the corresponding threshold count, and to provide the output count for storage in the coefficient register.