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US 7,242,614 B2Granted
Rewriteable electronic fuses
AssigneeImpinj, Inc.
InventorsChristopher J. Diorio, Frédéric J. Bernard, Todd E. Humes, Alberto Pesavento
Life of this patent
Estimating the term…
Abstract
Rewriteable electronic fuses include latches and/or logic gates coupled to one or more nonvolatile memory elements. The nonvolatile memory elements are configured to be programmed to memory values capable of causing associated electronic circuits to settle to predetermined states as power-up or reset signals are applied to the fuses. Although not required, the nonvolatile memory elements used in the rewriteable electronic fuses may comprise floating-gate transistors. An amount of charge stored on the floating gate of a given floating-gate transistor determines the memory value and, consequently, the state to which a fuse settles upon power-up or reset of the fuse.
Claims103
An electronic fuse, comprising:
- a latch;
- and
- a nonvolatile memory element coupled to said latch, said nonvolatile memory element comprising a pair of floating gate devices sharing a common floating gate and configured to be programmed to a memory value capable of causing said latch to settle to a predetermined one of a first state and a second state as a power-up or a reset signal is applied to the fuse, said programming taking place by way of one or both a charge-adding mechanism with which a first floating gate device of said pair is associated and a charge-removing mechanism with which a second floating gate device of said pair is associated.
An electronic fuse, comprising:
- a latch having two cross-coupled inverters;
- and
- a nonvolatile memory element coupled between a power source terminal of the fuse and a first of the two inverters of said latch, said nonvolatile memory element comprising a pair of floating gate devices sharing a common floating gate and configured to be programmed to a memory value capable of causing said latch to settle to a predetermined one of a first state and a second state as a power-up or a reset signal is applied to the fuse, said programming taking place by way of one or both a charge-adding mechanism with which a first floating gate device of said pair is associated and a charge-removing mechanism with which a second floating gate device of said pair is associated.
An electronic fuse, comprising:
- a latch having two cross-coupled inverters;
- and
- a nonvolatile memory element coupled in parallel with a transistor of a first of the two inverters of the latch, said nonvolatile memory element comprising a pair of floating gate devices sharing a common floating gate and configured to be programmed to a memory value capable of causing said latch to settle to a predetermined one of a first state and a second state as a power-up or a reset signal is applied to the fuse, said programming taking place by way of one or both a charge-adding mechanism with which a first floating gate device of said pair is associated and a charge-removing mechanism with which a second floating gate device of said pair is associated.
An electronic fuse, comprising:
- a latch;
- a first nonvolatile memory element coupled to a first node of the latch, said first nonvolatile memory element configured to be programmed to a first memory value;
- and
- a second nonvolatile memory element coupled to a second node of the latch, said second nonvolatile memory element configured to be programmed to a second memory value,
- wherein the first and second programmed memory values cause said latch to settle to a predetermined one of a first and a second state as a power-up or a reset signal is applied to the fuse, and wherein said first and second nonvolatile memory elements each comprises a pair of floating gate devices sharing a common floating gate, said programming taking place by way of one or both a charge-adding mechanism with which a first floating gate device of said pair is associated and a charge-removing mechanism with which a second floating gate device of said pair is associated.
2 more elements
An electronic fuse, comprising:
- a latch having two cross-coupled inverters;
- a first nonvolatile memory element coupled between a first power source or reset terminal of the fuse and a first of the two inverters of the latch;
- and
- a second nonvolatile memory element coupled between the first power source or reset terminal of the fuse and a second of the two inverters of the latch,
- wherein said first and second nonvolatile memory elements each comprises a pair of floating gate devices sharing a common floating gate, said programming taking place by way of one or both a charge-adding mechanism with which a first floating gate device of said pair is associated and a charge-removing mechanism with which a second floating gate device of said pair is associated.
2 more elements
An electronic fuse, comprising:
- a latch having two cross-coupled inverters;
- a first nonvolatile memory element coupled in parallel with a transistor of a first of the two inverters of the latch;
- and
- a second nonvolatile memory element coupled in parallel with a transistor of a second of the two inverters of the latch,
- wherein said first and second nonvolatile memory elements each comprises a pair of floating gate devices sharing a common floating gate, said programming taking place by way of one or both a charge-adding mechanism with which a first floating gate device of said pair is associated and a charge-removing mechanism with which a second floating gate device of said pair is associated.
2 more elements
Dependencies are inferred from the claim text.