Method of manufacturing insulated gate semiconductor device
AssigneeSanyo Electric Co., Ltd.
InventorsNobuyuki Sekikawa, Masaaki Momen, Wataru Andoh, Koichi Hirata
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AssigneeSanyo Electric Co., Ltd.
InventorsNobuyuki Sekikawa, Masaaki Momen, Wataru Andoh, Koichi Hirata
Estimating the term…
A gate electrode includes a first polysilicon film remaining on a first oxide film, a part of a second polysilicon layer 8 superimposed on the polysilicon layer, and a part of the second polysilicon layer partially extending over second gate oxide films. Thus, the thickness of the gate electrode on the first gate oxide film is the same as that of the gate electrode of the prior art, but the film thickness t2 of the gate electrode 10 on the second gate oxide films 6A and 6B is thinner than the thickness t1 of the prior art. Therefore, the height gap h2 between the gate electrode 10 and the N+type source layer 11 and the height gap h2 between the gate electrode 10 and the N+type drain layer 12 become smaller compared to those of prior art, leading to the improved flatness of the interlayer oxide film 13.
A method of manufacturing an insulated gate semiconductor device, comprising:
A method of manufacturing an insulated gate semiconductor device, comprising:
Dependencies are inferred from the claim text.