Versatile system for triple-gated transistors with engineered corners
AssigneeTexas Instruments Incorporated
InventorsMark R. Visokay, James J. Chambers
Life of this patent
Estimating the term…
Abstract
The present invention provides a system for producing a triple-gate transistor segment (300), utilizing a standard semiconductor substrate (302). The substrate has a plurality of isolation regions (304) formed along its upper surface in a distally separate relationship, defining a channel region (306). A form structure (308) is disposed atop the isolation regions, and defines a channel body area (310) over the channel region. A channel body structure (316) is disposed within the channel body area, and is engineered to provide a blunted corner or edge (318) along a perimeter of its upper exposed surface. The form structure is then removed, and subsequent processing is performed.
Claims9
A semiconductor device segment comprising:
- a substrate having an upper surface;
- a plurality of isolation regions, formed along the upper surface of the substrate in a distally separate relationship, defining a channel region;
- and
- a channel body, formed atop the upper surface of the substrate over the channel region, the channel body having a sidewall, a top surface and a blunted edge or corner along a perimeter of its top surface.
Dependencies are inferred from the claim text.