US 7,119,015 B2Granted

Method for forming polysilicon plug of semiconductor device

AssigneeHynix Semiconductor Inc.

InventorsHyung Soon Park, Min Suk Lee, Sang Ick Lee, Hyun Chul Sohn

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Abstract

Disclosed is a method for forming a polysilicon plug of a semiconductor device. The method comprises the steps of: forming a stacked pattern of a wordline and a hard mask film on a semiconductor substrate comprising a cell region and a peripheral circuit region; forming a spacer on a sidewall of the stacked pattern; forming an interlayer insulating film on the semiconductor substrate; polishing the interlayer insulating film via a CMP process using the hard mask film as a polishing barrier film; forming a barrier film on the semiconductor substrate including the interlayer insulating film; selectively etching the barrier film and the interlayer insulating film to form a landing plug contact hole; depositing a polysilicon film filling the landing plug contact hole on the semiconductor substrate; blanket-etching the polysilicon film using the barrier film as an etching barrier film; and polishing the polysilicon film and the barrier film using the hard mask film as a polishing barrier film to form a polysilicon plug.

Claims32

Dependent claims

A method for forming a polysilicon plug of a semiconductor device, comprising the steps of:

(a) forming a stacked pattern of a wordline and a hard mask film on a semiconductor substrate comprising a cell region and a peripheral circuit region;
(b) forming a spacer on a sidewall of the stacked pattern;
(c) forming an interlayer insulating film on the semiconductor substrate;
(d) polishing the interlayer insulating film via a CMP process until the hard mask film is exposed to planarize an entire surface of the resulting structure;
(e) forming a barrier film on the planarized entire surface of the exposed hard mask film and the interlayer insulating film;
(f) selectively etching the barrier film and the interlayer insulating film to form a landing plug contact hole;
(g) depositing a polysilicon film filling the landing plug contact hole on the semiconductor substrate;
(h) blanket-etching the polysilicon film using the barrier film as an etching barrier film;
and
(i) polishing the polysilicon film and the barrier film using the hard mask film as a polishing barrier film to form a polysilicon plug.

7 more elements

Dependencies are inferred from the claim text.

Facts

Application: 10/879,220Filed 30 Jun 2004
Priority: KR 10-2003-009607224 Dec 2003
Published: US 2005/0142867 A130 Jun 2005
Granted: 10 Oct 2006
Term ends: Not estimatedThe source records don’t support an estimate.

Classification3 codes

H10W 20/069
Of conductive parts of the interconnections: by forming self-aligned vias or self-aligned contact plugs
H10W 20/062
Of conductive parts of the interconnections: by smoothing of conductive parts, e.g. by planarisation
H10W
Generic packages, interconnections, connectors or other constructional details of devices covered by