Method of fabricating an integrated silicon-germanium heterobipolar transistor and an integrated silicon-germanium heterobipolar transistor
AssigneeTexas Instruments Incorporated
InventorsAlfred Haeusler, Philipp Steinmann, Scott Balster, Badih El-Kareh
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Abstract
In a method of fabricating an integrated silicon-germanium heterobipolar transistor a silicon dioxide layer arranged between a silicon-germanium base layer and a silicon emitter layer is formed by means of Rapid Thermal Processing (RTP) to ensure enhanced component properties of the integrated silicon-germanium heterobipolar transistor.
Claims19
A method of fabricating an integrated silicon-germanium heterobipolar transistor wherein between a silicon-germanium base layer and a silicon emitter layer a silicon dioxide layer is formed, characterized in that said silicon dioxide layer is formed by means of Rapid Thermal Processing (RTP), wherein said base layer is heated in a sequence of temperature steps to a process temperature at which said silicon dioxide layer is subsequently formed and wherein in a first temperature step said base layer is heated to a temperature between 350° C. and 500° C.
A method of fabricating an integrated circuit comprising the steps of:
- forming a silicon-germanium base layer on a wafer;
- transferring the silicon-germanium base layer to a Rapid Thermal Oxidation (RTO) chamber;
- heating the silicon-germanium base layer using a sequence of temperature steps in the RTO chamber;
- forming a silicon dioxide layer over the silicon-germanium base layer in said RTO chamber
- transferring the silicon-germanium base layer from the RTO chamber after forming the silicon dioxide layer;
- and
- forming a silicon emitter layer over the silicon dioxide layer.
Dependencies are inferred from the claim text.