Method of isolating the current sense on power devices while maintaining a continuous stripe cell
AssigneeFairchild Semiconductor Corporation
InventorsJoseph A. Yedinak, Dwayne S. Reichl, Douglas J. Lange
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AssigneeFairchild Semiconductor Corporation
InventorsJoseph A. Yedinak, Dwayne S. Reichl, Douglas J. Lange
Estimating the term…
An integrated circuit die includes an active area having source dopants and contacts. An active area metal layer overlies the active area. A sense area is disposed on the die. A sense area metal layer overlies the sense area. A plurality of polysilicon gate stripes, polysilicon openings, and body stripes are disposed on the die, and extend in a continuous and uninterrupted manner from the active area into the sense area. A first region from which source dopants and contacts have been excluded surrounds a periphery of the sense area. An etched region is disposed over the first region, thereby separating and electrically isolating the sense area metal layer from the active area metal layer.
On an integrated circuit die, a method of isolating a current sense area from a main device active area while maintaining a continuous stripe cell, the sense area having an overlying sense metal layer, the main device active area having an overlying active metal layer, said method comprising:
Dependencies are inferred from the claim text.