Memory systems and methods
AssigneeLattice Semiconductor Corporation
InventorsHemanshu T. Vernenker, Marge Tait, Allen White
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Abstract
Systems and methods are disclosed for memory, including techniques for reading and writing to memory. For example, in accordance with an embodiment of the present invention, a method of implementing a read and a write operation (e.g., a read before write operation) is disclosed for a memory, such as for example for a single port or a multiport memory, with the write operation beginning prior to the completion of the read operation.
Claims22
A memory system comprising:
- a memory core having one or more memory cells and bitlines;
- a read multiplexer adapted to select the bitlines for reading data from at least one of the memory cells upon assertion of a multiplexer control signal;
- a sense amplifier for providing a logical high or a logical low signal level, upon assertion of a sense amplifier control signal, based on a signal level on the bitlines selected by the read multiplexer;
- a latch for storing the logical high or the logical low signal level from the sense amplifier to provide as a data output signal;
- and
- a write circuit adapted to write data to at least one of the memory cells upon assertion of a write control signal, wherein for a read before write operation, the write control signal is asserted prior to the logical high or the logical low signal level being stored by the latch.
An integrated circuit comprising:
- a plurality of memory cells having associated bitlines;
- an address decode circuit adapted to select from among the memory cells;
- a precharge circuit adapted to precharge the bitlines of the memory cells;
- a read circuit adapted to select from among the bitlines to read from at least one of the memory cells upon assertion of a read control signal;
- a latch circuit adapted to store data from the at least one memory cell being read;
- and
- a write circuit adapted to write data to at least one of the memory cells upon assertion of a write control signal, wherein the write control signal is asserted based upon when the read control signal is deasserted during a read before write operation.
A method of reading from a memory and writing to the memory, the method comprising:
- precharging bitlines of the memory;
- selecting which bitlines data is to be read from;
- reading the data provided by the bitlines to provide a data value based on the data;
- deselecting the bitlines that data is being read from during the reading of the data and prior to the data being latched;
- and
- beginning the writing of input data to the memory based upon the deselecting of the bitlines.
A method of reading from a memory and writing to the memory, the method comprising:
- precharging bitlines of the memory;
- selecting which bitlines data is to be read from;
- reading the data provided by the bitlines to provide a data value based on the data;
- latching the data value;
- starting the writing of input data to the memory before the reading has been completed by assertion of a write control signal prior to the latching;
- and
- providing the data value as a data output signal.
Dependencies are inferred from the claim text.