Electrically programmable memory cell and methods for programming and reading from such a memory cell

A programmable memory cell comprising:

• a memory transistor having a source zone, a drain zone, a storage electrode, and a control electrode;
• a selection transistor having a source zone, a drain zone, a control electrode, and a channel zone, the drain zone further comprising a connection zone;
• means for electrically isolating the storage electrode of the memory transistor;
• means for electrically isolating the storage electrode of the selection transistor;
• means within the drain zone of the selection transistor, arranged between the connection zone and the channel zone of the selection transistor, for taking up a programming voltage applied to the selection transistor.

A method for programming a memory cell comprising:

• providing a memory transistor having a first and a second semiconductor zone of a first conduction type, a first body zone having a channel zone between the first and second semiconductor zones, a storage electrode isolated from the first and second semiconductor zones and the first body zone, and a first control electrode;
• providing a selection transistor having a third and a fourth semiconductor zone of the first conduction type, a second body zone of a second conduction type having a channel zone between the third and fourth semiconductor zones, and a second control electrode;
• connecting the second semiconductor zone of the memory transistor to the third semiconductor zone of the selection transistor;
• arranging an intermediate zone between a connection zone and the channel zone, and
• doping the intermediate zone more weakly than the connection zone.