Collector layer structure for a double hetero-junction bipolar transistor for power amplification applications

An indium phosphide-based semiconductor double heterostructure bipolar transistor comprising:

• an emitter region having a first bandgap;
• a base region in electrical communication with the emitter region, the base region having a second bandgap different from the first bandgap;
• and
• a collector region in electrical communication with the base and emitter regions, the collector region having a third bandgap different from the second bandgap;
• a sub-collector in electrical communication with the collector region, wherein the collector region contains indium and phosphorous, the collector region containing at least three layers having different conductivities;
• and
• a sub-collector in electrical communication with the collector region, wherein the collector region comprises a first layer, a second layer adjacent to the first layer that has a lowest conductivity of the three layers, and a third layer adjacent to the second layer that has a highest conductivity of the three layers, and the first layer is closer to the sub-collector than either the second or third layers.